adafruit-mirror/zephyr
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions 9

boards: adi: Add MAX78000FTHR board

Browse source 
This commit adds MAX78000FTHR board.

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
This commit is contained in:
Yasin Ustuner 2024-12-16 12:40:18 +03:00 committed by Benjamin Cabé
parent 11e913b65a
commit 426c586868
8 changed files with 403 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
boards/adi/max78000fthr/Kconfig.max78000fthr Normal file
View file

@ -0,0 +1,7 @@
# MAX78000FTHR boards configuration
# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
config BOARD_MAX78000FTHR
select SOC_MAX78000_M4 if BOARD_MAX78000FTHR_MAX78000_M4

7
boards/adi/max78000fthr/board.cmake Normal file
View file

@ -0,0 +1,7 @@
# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]")
board_runner_args(openocd --cmd-pre-init "source [find target/max78000.cfg]")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

9
boards/adi/max78000fthr/board.yml Normal file
View file

@ -0,0 +1,9 @@
# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
board:
name: max78000fthr
full_name: MAX78000FTHR
vendor: adi
socs:
- name: max78000

BIN
boards/adi/max78000fthr/doc/img/max78000fthr_img1.webp Normal file
View file

Binary file not shown.
Side by side

After

Width:  |  Height:  |  Size: 56 KiB

210
boards/adi/max78000fthr/doc/index.rst Normal file
View file

@ -0,0 +1,210 @@
.. zephyr:board:: max78000fthr
Overview
********
The MAX78000FTHR is a rapid development platform to help engineers quickly implement ultra low-power, artificial
intelligence (AI) solutions using the MAX78000 Arm® Cortex®-M4F processor with an integrated Convolutional Neural Network
accelerator. The board also includes the MAX20303 PMIC for battery and power management. The form factor is 0.9in x 2.6in
dual-row header footprint that is compatible with Adafruit Feather Wing peripheral expansion boards. The board includes a
variety of peripherals, such as a CMOS VGA image sensor, digital microphone, low-power stereo audio CODEC, 1MB QSPI
SRAM, micro SD card connector, RGB indicator LED, and pushbutton. The MAX78000FTHR provides a poweroptimized flexible
platform for quick proof-of-concepts and early software development to enhance time to market.
The Zephyr port is running on the MAX78000 MCU.
.. image:: img/max78000fthr_img1.webp
:align: center
:alt: MAX78000 FTHR
Hardware
********
- MAX78000 MCU:
- Dual-Core, Low-Power Microcontroller
- Arm Cortex-M4 Processor with FPU up to 100MHz
- 512KB Flash and 128KB SRAM
- Optimized Performance with 16KB Instruction Cache
- Optional Error Correction Code (ECC-SEC-DED) for SRAM
- 32-Bit RISC-V Coprocessor up to 60MHz
- Up to 52 General-Purpose I/O Pins
- 12-Bit Parallel Camera Interface
- One I2S Master/Slave for Digital Audio Interface
- Neural Network Accelerator
- Highly Optimized for Deep Convolutional Neural Networks
- 442k 8-Bit Weight Capacity with 1,2,4,8-Bit Weights
- Programmable Input Image Size up to 1024 x 1024 pixels
- Programmable Network Depth up to 64 Layers
- Programmable per Layer Network Channel Widths up to 1024 Channels
- 1 and 2 Dimensional Convolution Processing
- Streaming Mode
- Flexibility to Support Other Network Types, Including MLP and Recurrent Neural Networks
- Power Management Maximizes Operating Time for Battery Applications
- Integrated Single-Inductor Multiple-Output (SIMO) Switch-Mode Power Supply (SMPS)
- 2.0V to 3.6V SIMO Supply Voltage Range
- Dynamic Voltage Scaling Minimizes Active Core Power Consumption
- 22.2μA/MHz While Loop Execution at 3.0V from Cache (CM4 Only)
- Selectable SRAM Retention in Low-Power Modes with Real-Time Clock (RTC) Enabled
- Security and Integrity
- Available Secure Boot
- AES 128/192/256 Hardware Acceleration Engine
- True Random Number Generator (TRNG) Seed Generator
Supported Features
==================
The ``max78000fthr/max78000/m4`` board target supports the following interfaces:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock and reset control |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| DMA | on-chip | dma controller |
+-----------+------------+-------------------------------------+
| Watchdog | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| Flash | on-chip | flash |
+-----------+------------+-------------------------------------+
| Timer | on-chip | pwm |
+-----------+------------+-------------------------------------+
| RTC | on-chip | real time clock |
+-----------+------------+-------------------------------------+
| Timer | on-chip | counter |
+-----------+------------+-------------------------------------+
| W1 | on-chip | one wire master |
+--------------------------------------------------------------+
Connections and IOs
===================
J8 Pinout
**********
+---------+----------+-------------------------------------------------------------------------------------------------+
| Pin | Name | Description |
+=========+==========+=================================================================================================+
| 1 | RST | Master Reset Signal |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 2 | 3V3 | 3.3V Output. Typically used to provide 3.3V to peripherals connected to the expansion headers. |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 3 | 1V8 | 1.8V Output. Typically used to provide 1.8V to peripherals connected to the expansion headers. |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 4 | GND | Ground |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 5 | P2_3 | GPIO or Analog Input (AIN3 channel). |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 6 | P2_4 | GPIO or Analog Input (AIN4 channel). |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 7 | P1_1 | GPIO or UART2 Tx signal |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 8 | P1_0 | GPIO or UART2 Rx signal |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 9 | MPC1 | GPIO controlled by PMIC through I2C interface. Open drain or push-pull programmable |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 10 | MPC2 | GPIO controlled by PMIC through I2C interface. Open drain or push-pull programmable |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 11 | P0_7 | GPIO or QSPI0 clock signal. Shared with SD card and on-board QSPI SRAM |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 12 | P0_5 | GPIO or QSPI0 MOSI signal. Shared with SD card and on-board QSPI SRAM |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 13 | P0_6 | GPIO or QSPI0 MISO signal. Shared with SD card and on-board QSPI SRAM |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 14 | P2_6 | GPIO or LPUART Rx signal |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 15 | P2_7 | GPIO or LPUART Tx signal |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 16 | GND | Ground |
+---------+----------+-------------------------------------------------------------------------------------------------+
J4 Pinout
**********
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| Pin | Name | Description |
+=========+==========+===========================================================================================================+
| 1 | SYS | SYS Switched Connection to the Battery. This is the primary system power supply and automatically |
| | | switches between the battery voltage and the USB supply when available. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 2 | PWR | Turns off the PMIC if shorted to Ground for 13 seconds. Hard power-down button. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 3 | VBUS | USB VBUS Signal. This can be used as a 5V supply when connected to USB. This pin can also be |
| | | used as an input to power the board. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 4 | P1_6 | GPIO |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 5 | MPC3 | GPIO controlled by PMIC through the I2C interface. Open drain or push-pull programmable. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 6 | P0_9 | GPIO or QSPI0 SDIO3 signal. Shared with SD card and on-board QSPI SRAM. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 7 | P0_8 | GPIO or QSPI0 SDIO2 signal. Shared with SD Card and on-board QSPI SRAM. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 8 | P0_11 | GPIO or QSPI0 slave select signal |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 9 | P0_19 | GPIO |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 10 | P3_1 | GPIO or Wake-up signal. This pin is 3.3V only. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 11 | P0_16 | GPIO or I2C1 SCL signal. An on-board level shifter allows selecting 1.8V or 3.3V operation through |
| | | R15 or R20 resistors. Do not populate both. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 12 | P0_17 | GPIO or I2C1 SDA signal. An on-board level shifter allows selecting 1.8V or 3.3V operation through |
| | | R15 or R20 resistors. Do not populate both. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
Programming and Debugging
*************************
Flashing
========
The MAX32625 microcontroller on the board is preprogrammed with DAPLink firmware.
It allows debugging and programming of the MAX78000 Arm core over USB.
Once the debug probe is connected to your host computer, then you can simply run the
``west flash`` command to write a firmware image into flash.
.. note::
This board uses OpenOCD as the default debug interface. You can also use
a Segger J-Link with Segger's native tooling by overriding the runner,
appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
be connected to the standard 2*5 pin debug connector (JH5) using an
appropriate adapter board and cable.
Debugging
=========
Please refer to the `Flashing`_ section and run the ``west debug`` command
instead of ``west flash``.
References
**********
- `MAX78000FTHR web page`_
.. _MAX78000FTHR web page:
https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78000fthr.html

130
boards/adi/max78000fthr/max78000fthr_max78000_m4.dts Normal file
View file

@ -0,0 +1,130 @@
/*
* Copyright (c) 2025 Analog Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <adi/max32/max78000.dtsi>
#include <adi/max32/max78000-pinctrl.dtsi>
#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Analog Devices MAX78000FTHR";
compatible = "adi,max78000fthr";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &sram2;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
led1: led_1 {
gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
label = "Red LED";
};
led2: led_2 {
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
label = "Green LED";
};
led3: led_3 {
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
label = "Blue LED";
};
};
buttons {
compatible = "gpio-keys";
pb1: pb1 {
gpios = <&gpio0 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW1";
zephyr,code = <INPUT_KEY_0>;
};
pb2: pb2 {
gpios = <&gpio1 7 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW2";
zephyr,code = <INPUT_KEY_1>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led1;
led1 = &led2;
sw0 = &pb1;
sw1 = &pb2;
watchdog0 = &wdt0;
};
};
&uart0 {
pinctrl-0 = <&uart0a_tx_p0_1 &uart0a_rx_p0_0>;
pinctrl-names = "default";
current-speed = <115200>;
data-bits = <8>;
parity = "none";
status = "okay";
};
&clk_ipo {
status = "okay";
};
&clk_ibro {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&trng {
status = "okay";
};
&i2c0 {
status = "okay";
pinctrl-0 = <&i2c0_scl_p0_10 &i2c0_sda_p0_11>;
pinctrl-names = "default";
};
&spi0 {
status = "okay";
pinctrl-0 = <&spi0_mosi_p0_5 &spi0_miso_p0_6 &spi0_sck_p0_7 &spi0_ss0_p0_4>;
pinctrl-names = "default";
};
&dma0 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&w1 {
pinctrl-0 = <&owm_io_p0_6 &owm_pe_p0_7>;
pinctrl-names = "default";
};

24
boards/adi/max78000fthr/max78000fthr_max78000_m4.yaml Normal file
View file

@ -0,0 +1,24 @@
identifier: max78000fthr/max78000/m4
name: max78000fthr m4
vendor: adi
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- counter
- dma
- flash
- gpio
- i2c
- pwm
- serial
- spi
- trng
- w1
- watchdog
ram: 128
flash: 512

16
boards/adi/max78000fthr/max78000fthr_max78000_m4_defconfig Normal file
View file

@ -0,0 +1,16 @@
# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
# Enable MPU
CONFIG_ARM_MPU=y
# Enable GPIO
CONFIG_GPIO=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable UART
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y