drivers: i2s: update i2s_mcux_sai.c
On RT1180/RT700, there is no gpr register on soc, so change driver to get configuration register base address from dts, instead of hard code. Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
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384e940c66
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42ad39b169
1 changed files with 6 additions and 3 deletions
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@ -88,6 +88,7 @@ struct i2s_mcux_config {
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uint32_t pll_pd;
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uint32_t pll_num;
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uint32_t pll_den;
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uint32_t *mclk_control_base;
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uint32_t mclk_pin_mask;
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uint32_t mclk_pin_offset;
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uint32_t tx_channel;
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@ -406,12 +407,12 @@ static void enable_mclk_direction(const struct device *dev, bool dir)
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const struct i2s_mcux_config *dev_cfg = dev->config;
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uint32_t offset = dev_cfg->mclk_pin_offset;
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uint32_t mask = dev_cfg->mclk_pin_mask;
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uint32_t *gpr = (uint32_t *)(DT_REG_ADDR(DT_NODELABEL(iomuxcgpr)) + offset);
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uint32_t *base = (uint32_t *)(dev_cfg->mclk_control_base + offset);
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if (dir) {
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*gpr |= mask;
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*base |= mask;
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} else {
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*gpr &= ~mask;
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*base &= ~mask;
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}
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}
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@ -1182,6 +1183,8 @@ static DEVICE_API(i2s, i2s_mcux_driver_api) = {
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.pll_pd = DT_PHA_BY_NAME(DT_DRV_INST(i2s_id), pll_clocks, pd, value), \
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.pll_num = DT_PHA_BY_NAME(DT_DRV_INST(i2s_id), pll_clocks, num, value), \
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.pll_den = DT_PHA_BY_NAME(DT_DRV_INST(i2s_id), pll_clocks, den, value), \
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.mclk_control_base = \
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(uint32_t *)DT_REG_ADDR(DT_PHANDLE(DT_DRV_INST(i2s_id), pinmuxes)), \
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.mclk_pin_mask = DT_PHA_BY_IDX(DT_DRV_INST(i2s_id), pinmuxes, 0, function), \
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.mclk_pin_offset = DT_PHA_BY_IDX(DT_DRV_INST(i2s_id), pinmuxes, 0, pin), \
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.clk_sub_sys = \
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