dts: riscv: telink_b91: replace pinmux by pinctrl
Replaced pinmux by new pinctrl driver for Telink B91. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
This commit is contained in:
Yuriy Vynnychek
Anas Nashif
parent
42d1d9c17c
commit
4747f3ac3d
3 changed files with 107 additions and 224 deletions
103
dts/bindings/pinctrl/telink,b91-pinctrl.yaml
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103
dts/bindings/pinctrl/telink,b91-pinctrl.yaml
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@ -0,0 +1,103 @@
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# Copyright (c) 2022, Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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description: |
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The Telink B91 pin controller is a singleton node responsible for
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controlling pin function selection and pin properties. For example, you can
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use this node to route UART0 TX to pin PB2 and enable the pull-up resistor
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on the pin.
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The node has the 'pinctrl' node label set in your SoC's devicetree,
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so you can modify it like this:
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&pinctrl {
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/* your modifications go here */
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};
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All device pin configurations should be placed in child nodes of the
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'pinctrl' node, as shown in this example:
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/* You can put this in places like a board-pinctrl.dtsi file in
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* your board directory, or a devicetree overlay in your application.
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*/
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/* include pre-defined pins and functions for the SoC used by the board */
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#include <dt-bindings/pinctrl/b91-pinctrl.h>
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&pinctrl {
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/* configuration for UART0 TX default state */
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uart0_tx_pb2_default: uart0_tx_pb2_default {
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/* configure PB2 as B91_FUNC_C */
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pinmux = <B91_PINMUX_SET(B91_PORT_B, B91_PIN_2, B91_FUNC_C)>;
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};
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/* configuration for UART0 RX default state */
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uart0_rx_pb3_default: uart0_rx_pb3_default {
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/* configure PB2 as B91_FUNC_C */
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pinmux = <B91_PINMUX_SET(B91_PORT_B, B91_PIN_3, B91_FUNC_C)>;
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};
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};
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The 'uart0_tx_pb2_default' child node encodes the pin configurations
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for a particular state of a device; in this case, the default
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(that is, active) sate. You would specify the low-power configuration for
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the same device in a separate child node.
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A pin configuration can also specify pin properties such as the
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'bias-pull-up' property. Here is a list of supported standard pin
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properties:
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- bias-disable
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- bias-pull-down
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- bias-pull-up
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To link pin configurations with a device, use a pinctrl-N property for some
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number N, like this example you could place in your board's DTS file:
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#include "board-pinctrl.dtsi"
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&uart0 {
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pinctrl-0 = <&uart0_tx_pb2_default &uart0_rx_pb3_default>;
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pinctrl-1 = <&uart0_tx_pb2_sleep &uart0_rx_pb3_sleep>;
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pinctrl-names = "default", "sleep";
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};
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compatible: "telink,b91-pinctrl"
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include:
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- name: base.yaml
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- name: pincfg-node.yaml
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child-binding:
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property-allowlist:
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- bias-disable
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- bias-pull-down
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- bias-pull-up
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properties:
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reg:
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required: true
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label:
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required: true
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pad-mul-sel:
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type: int
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required: true
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description: |
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PinMux pad_mul_sel register value. Pin functions depend on it.
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For instance:
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Function C of PB2 configs the pin to UART0_TX if pad_mul_sel is set to <1>.
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But, the same function configs the same pin to DAC_I_DAT2_I if pad_mul_sel is set to <0>.
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Refer to the Telink TLSR9 specs to get more information about pins configuration.
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child-binding:
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description: |
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This binding gives a base representation of the Telink B91 pins configration.
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properties:
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pinmux:
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required: true
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type: int
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description: |
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Telink B91 pin's configuration (port, pin and function).
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@ -1,29 +0,0 @@
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# Copyright (c) 2021, Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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description: Telink B91 PinMux
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compatible: "telink,b91-pinmux"
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include: base.yaml
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properties:
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reg:
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required: true
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label:
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required: true
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pad-mul-sel:
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type: int
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required: true
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description: PinMux pad_mul_sel register values.
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child-binding:
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description:
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This binding gives a base representation of the Telink B91 pins configration.
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properties:
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pinmux:
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required: true
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type: int
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@ -8,7 +8,6 @@
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/pinctrl/b91-pinctrl.h>
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/ {
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#address-cells = <1>;
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@ -206,206 +205,16 @@
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clock-frequency = <I2C_BITRATE_STANDARD>;
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};
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pinmux: pinmux@80140330 {
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compatible = "telink,b91-pinmux";
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pinctrl: pinctrl@80140330 {
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compatible = "telink,b91-pinctrl";
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reg = <0x80140330 0x28
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0x80140306 0x28
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0x0000000e 0x0C>;
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reg-names = "pin_mux",
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"gpio_en",
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"pull_up_en";
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label = "PINMUX";
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status = "disabled";
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/* UART0: TX(PA3 PB2 PD2), RX(PA4 PB3 PD3) */
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uart0_tx_pa3: uart0_tx_pa3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_A, B91_PIN_3)>;
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};
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uart0_tx_pb2: uart0_tx_pb2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_2)>;
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};
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uart0_tx_pd2: uart0_tx_pd2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_2)>;
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};
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uart0_rx_pa4: uart0_rx_pa4 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_A, B91_PIN_4)>;
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};
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uart0_rx_pb3: uart0_rx_pb3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_3)>;
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};
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uart0_rx_pd3: uart0_rx_pd3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_3)>;
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};
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/* UART1: TX(PC6 PD6 PE0), RX(PC7 PD7 PE2) */
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uart1_tx_pc6: uart1_tx_pc6 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_C, B91_PIN_6)>;
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};
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uart1_tx_pd6: uart1_tx_pd6 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_6)>;
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};
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uart1_tx_pe0: uart1_tx_pe0 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_E, B91_PIN_0)>;
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};
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uart1_rx_pc7: uart1_rx_pc7 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_C, B91_PIN_7)>;
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};
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uart1_rx_pd7: uart1_rx_pd7 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_7)>;
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};
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uart1_rx_pe2: uart1_rx_pe2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_E, B91_PIN_2)>;
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};
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/* PWM Channel 0 (PB4, PC0, PE3) */
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pwm_ch0_pb4: pwm_ch0_pb4 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_4)>;
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};
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pwm_ch0_pc0: pwm_ch0_pc0 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_C, B91_PIN_0)>;
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};
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pwm_ch0_pe3: pwm_ch0_pe3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_3)>;
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};
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/* PWM Channel 1 (PB5, PE1) */
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pwm_ch1_pb5: pwm_ch1_pb5 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_5)>;
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};
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pwm_ch1_pe1: pwm_ch1_pe1 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_1)>;
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};
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/* PWM Channel 2 (PB7, PE2) */
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pwm_ch2_pb7: pwm_ch2_pb7 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_7)>;
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};
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pwm_ch2_pe2: pwm_ch2_pe2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_2)>;
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};
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/* PWM Channel 3 (PB1, PE0) */
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pwm_ch3_pb1: pwm_ch3_pb1 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_1)>;
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};
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pwm_ch3_pe0: pwm_ch3_pe0 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_0)>;
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};
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/* PWM Channel 4 (PD7, PE4) */
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pwm_ch4_pd7: pwm_ch4_pd7 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_D, B91_PIN_7)>;
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};
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pwm_ch4_pe4: pwm_ch4_pe4 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_4)>;
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};
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/* PWM Channel 5 (PB0, PE5) */
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pwm_ch5_pb0: pwm_ch5_pb0 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_0)>;
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};
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pwm_ch5_pe5: pwm_ch5_pe5 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_5)>;
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};
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/* PSPI: CLK(PC5, PB5, PD1), MOSI(PC7, PB7, PD3), MISO(PC6, PB6, PD2) */
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pspi_clk_pc5: pspi_clk_pc5 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_C, B91_PIN_5)>;
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};
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pspi_mosi_io0_pc7: pspi_mosi_io0_pc7 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_C, B91_PIN_7)>;
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};
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pspi_miso_io1_pc6: pspi_miso_io1_pc6 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_C, B91_PIN_6)>;
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};
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pspi_clk_pb5: pspi_clk_pb5 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_5)>;
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};
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pspi_mosi_io0_pb7: pspi_mosi_io0_pb7 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_7)>;
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};
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pspi_miso_io1_pb6: pspi_miso_io1_pb6 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_6)>;
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};
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pspi_clk_pd1: pspi_clk_pd1 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_1)>;
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};
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pspi_mosi_io0_pd3: pspi_mosi_io0_pd3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_3)>;
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};
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pspi_miso_io1_pd2: pspi_miso_io1_pd2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_2)>;
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};
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/* HSPI: CLK(PA2, PB4), MOSI(PA4, PB3), MISO(PA3, PB2) */
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hspi_clk_pa2: hspi_clk_pa2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_A, B91_PIN_2)>;
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};
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hspi_mosi_io0_pa4: hspi_mosi_io0_pa4 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_A, B91_PIN_4)>;
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};
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hspi_miso_io1_pa3: hspi_miso_io1_pa3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_A, B91_PIN_3)>;
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};
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hspi_clk_pb4: hspi_clk_pb4 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_4)>;
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};
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hspi_mosi_io0_pb3: hspi_mosi_io0_pb3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_3)>;
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};
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hspi_miso_io1_pb2: hspi_miso_io1_pb2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_2)>;
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};
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hspi_io2_pb1: hspi_io2_pb1 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_1)>;
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};
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hspi_io3_pb0: hspi_io3_pb0 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_0)>;
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};
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/* Define I2C pins: SCL(PB2, PC1, PE0, PE1), SDA(PB3, PC2, PE2, PE3) */
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i2c_scl_pb2: i2c_scl_pb2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_2)>;
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};
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i2c_scl_pc1: i2c_scl_pc1 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_C, B91_PIN_1)>;
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};
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i2c_scl_pe0: i2c_scl_pe0 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_E, B91_PIN_0)>;
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};
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i2c_scl_pe1: i2c_scl_pe1 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_E, B91_PIN_1)>;
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};
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i2c_sda_pb3: i2c_sda_pb3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_3)>;
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};
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i2c_sda_pc2: i2c_sda_pc2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_C, B91_PIN_2)>;
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};
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i2c_sda_pe2: i2c_sda_pe2 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_E, B91_PIN_2)>;
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};
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i2c_sda_pe3: i2c_sda_pe3 {
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pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_E, B91_PIN_3)>;
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};
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label = "PINCTRL";
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status = "okay";
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};
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};
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};
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