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arch: riscv: isr.S: restore s0 before jumping to z_riscv_fatal_error_csf

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Restore the s0 we saved early in ISR entry so it shows up
properly in the CSF.

Signed-off-by: David Reiss <dreiss@meta.com>
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
This commit is contained in:
Yong Cong Sin 2024-09-09 16:56:57 +08:00 committed by Alberto Escolar
parent fe5bfc9eb2
commit 4bbc2a7893
1 changed files with 6 additions and 0 deletions
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6
arch/riscv/core/isr.S
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@ -443,6 +443,12 @@ do_fault:
1: mv a1, sp
#ifdef CONFIG_EXCEPTION_DEBUG
/*
* Restore the s0 we saved early in ISR entry
* so it shows up properly in the CSF.
*/
lr s0, __struct_arch_esf_s0_OFFSET(sp)
/* Allocate space for caller-saved registers on current thread stack */
addi sp, sp, -__callee_saved_t_SIZEOF