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drivers: clock control: stm32 pll clock config for I2S

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The stm32F41x have a PLLI2S M divider for their PLL I2S
but others like the stm32F401 or stm32F74x have the PLL M
divider from the main PLL : might affect the sysclock.
LL Function is the same for configuring the PLL I2S but
parameter could depends on the stm32 serie.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
Francois Ramu 2024-11-25 11:38:28 +01:00 committed by Anas Nashif
parent f4152127ad
commit 505e1e519f
2 changed files with 6 additions and 7 deletions
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6
drivers/clock_control/clock_stm32_ll_common.h
View file

@ -27,7 +27,13 @@
#define z_pllr(v) LL_RCC_PLLR_DIV_ ## v
#define pllr(v) z_pllr(v)
#if defined(RCC_PLLI2SCFGR_PLLI2SM)
/* Some stm32F4 devices have a dedicated PLL I2S with M divider */
#define z_plli2s_m(v) LL_RCC_PLLI2SM_DIV_ ## v
#else
/* Some stm32F4 devices (typ. stm32F401) have a dedicated PLL I2S with PLL M divider */
#define z_plli2s_m(v) LL_RCC_PLLM_DIV_ ## v
#endif /* RCC_PLLI2SCFGR_PLLI2SM */
#define plli2sm(v) z_plli2s_m(v)
#define z_plli2s_r(v) LL_RCC_PLLI2SR_DIV_ ## v

7
drivers/clock_control/clock_stm32f2_f4_f7.c
View file

@ -104,17 +104,10 @@ void config_pll_sysclock(void)
__unused
void config_plli2s(void)
{
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f4_plli2s_clock)
LL_RCC_PLLI2S_ConfigDomain_I2S(get_pll_source(),
pllm(STM32_PLLI2S_M_DIVISOR),
STM32_PLLI2S_N_MULTIPLIER,
plli2sr(STM32_PLLI2S_R_DIVISOR));
#elif DT_HAS_COMPAT_STATUS_OKAY(st_stm32f412_plli2s_clock)
LL_RCC_PLL_ConfigDomain_I2S(get_pll_source(),
plli2sm(STM32_PLLI2S_M_DIVISOR),
STM32_PLLI2S_N_MULTIPLIER,
plli2sr(STM32_PLLI2S_R_DIVISOR));
#endif
}
#endif /* STM32_PLLI2S_ENABLED */