arch: exception: rename header guard

Match guard with header file name.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2023-12-08 08:53:19 -05:00
parent ca3839ca38
commit 552f7194e3
9 changed files with 27 additions and 27 deletions

View file

@ -11,8 +11,8 @@
* Exception/interrupt context helpers.
*/
#ifndef ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_A_R_EXC_H_
#define ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_A_R_EXC_H_
#ifndef ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_A_R_EXCEPTION_H_
#define ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_A_R_EXCEPTION_H_
#include <zephyr/arch/cpu.h>
@ -64,4 +64,4 @@ extern void z_arm_cortex_r_svc(void);
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_A_R_EXC_H_ */
#endif /* ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_A_R_EXCEPTION_H_ */

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@ -11,8 +11,8 @@
* Exception/interrupt context helpers.
*/
#ifndef ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_M_EXC_H_
#define ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_M_EXC_H_
#ifndef ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_M_EXCEPTION_H_
#define ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_M_EXCEPTION_H_
#include <zephyr/arch/cpu.h>
@ -200,4 +200,4 @@ bool z_arm_debug_monitor_event_error_check(void);
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_M_EXC_H_ */
#endif /* ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_M_EXCEPTION_H_ */

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@ -11,8 +11,8 @@
* Exception/interrupt context helpers.
*/
#ifndef ZEPHYR_ARCH_ARM64_INCLUDE_EXC_H_
#define ZEPHYR_ARCH_ARM64_INCLUDE_EXC_H_
#ifndef ZEPHYR_ARCH_ARM64_INCLUDE_EXCEPTION_H_
#define ZEPHYR_ARCH_ARM64_INCLUDE_EXCEPTION_H_
#include <zephyr/arch/cpu.h>
@ -37,4 +37,4 @@ static ALWAYS_INLINE bool arch_is_in_isr(void)
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_ARCH_ARM64_INCLUDE_EXC_H_ */
#endif /* ZEPHYR_ARCH_ARM64_INCLUDE_EXCEPTION_H_ */

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@ -11,8 +11,8 @@
* ARC-specific kernel exception handling interface. Included by arc/arch.h.
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_EXC_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_EXC_H_
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_EXCEPTION_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_EXCEPTION_H_
#ifdef __cplusplus
extern "C" {
@ -44,4 +44,4 @@ typedef struct _irq_stack_frame z_arch_esf_t;
#define ARC_EV_MISALIGNED 0xD
#define ARC_EV_VEC_UNIT 0xE
#endif /* ZEPHYR_INCLUDE_ARCH_ARC_V2_EXC_H_ */
#endif /* ZEPHYR_INCLUDE_ARCH_ARC_V2_EXCEPTION_H_ */

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@ -9,8 +9,8 @@
* @brief ARM AArch32 Cortex-A and Cortex-R public exception handling
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_A_R_EXC_H_
#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_A_R_EXC_H_
#ifndef ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_A_R_EXCEPTION_H_
#define ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_A_R_EXCEPTION_H_
#ifdef _ASMLANGUAGE
GTEXT(z_arm_exc_exit);
@ -85,4 +85,4 @@ extern void z_arm_exc_exit(bool fatal);
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_A_R_EXC_H_ */
#endif /* ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_A_R_EXCEPTION_H_ */

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@ -9,8 +9,8 @@
* @brief ARM AArch32 Cortex-M public exception handling
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_M_EXC_H_
#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_M_EXC_H_
#ifndef ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_EXCEPTION_H_
#define ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_EXCEPTION_H_
#include <zephyr/devicetree.h>
@ -129,4 +129,4 @@ extern void z_arm_exc_exit(void);
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_M_EXC_H_ */
#endif /* ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_EXCEPTION_H_ */

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@ -12,8 +12,8 @@
* arm/arch.h.
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_EXC_H_
#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_EXC_H_
#ifndef ZEPHYR_INCLUDE_ARCH_ARM_EXCEPTION_H_
#define ZEPHYR_INCLUDE_ARCH_ARM_EXCEPTION_H_
#if defined(CONFIG_CPU_CORTEX_M)
#include <zephyr/arch/arm/cortex_m/exception.h>
@ -23,4 +23,4 @@
#error Unknown ARM architecture
#endif /* CONFIG_CPU_CORTEX_M */
#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_EXC_H_ */
#endif /* ZEPHYR_INCLUDE_ARCH_ARM_EXCEPTION_H_ */

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@ -6,8 +6,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_ARCH_MIPS_EXP_H_
#define ZEPHYR_INCLUDE_ARCH_MIPS_EXP_H_
#ifndef ZEPHYR_INCLUDE_ARCH_MIPS_EXPCEPTION_H_
#define ZEPHYR_INCLUDE_ARCH_MIPS_EXPCEPTION_H_
#ifndef _ASMLANGUAGE
#include <zephyr/types.h>
@ -58,4 +58,4 @@ typedef struct __esf z_arch_esf_t;
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_ARCH_MIPS_EXP_H_ */
#endif /* ZEPHYR_INCLUDE_ARCH_MIPS_EXPCEPTION_H_ */

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@ -12,8 +12,8 @@
* RISCV-specific kernel exception handling interface.
*/
#ifndef ZEPHYR_INCLUDE_ARCH_RISCV_EXP_H_
#define ZEPHYR_INCLUDE_ARCH_RISCV_EXP_H_
#ifndef ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_
#define ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_
#ifndef _ASMLANGUAGE
#include <zephyr/types.h>
@ -98,4 +98,4 @@ typedef struct soc_esf soc_esf_t;
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_ARCH_RISCV_EXP_H_ */
#endif /* ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_ */