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drivers: gpio: mcux_igpio: add MMIO mapping support

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Map MMIO memory by using DEVICE_MMIO_NAMED_x() APIs.

And some platforms has no soc.h, so use __has_include to check it
firstly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
This commit is contained in:
Jiafei Pan 2024-12-13 18:43:11 +08:00 committed by Benjamin Cabé
parent 06c29b1b61
commit 55f0b87143
1 changed files with 27 additions and 17 deletions
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44
drivers/gpio/gpio_mcux_igpio.c
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@ -10,7 +10,9 @@
#include <zephyr/device.h> #include <zephyr/device.h>
#include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio.h>
#include <zephyr/irq.h> #include <zephyr/irq.h>
#if __has_include("soc.h")
#include <soc.h> #include <soc.h>
#endif
#include <fsl_common.h> #include <fsl_common.h>
#include <fsl_gpio.h> #include <fsl_gpio.h>
@ -18,11 +20,15 @@
#include <zephyr/drivers/gpio/gpio_utils.h> #include <zephyr/drivers/gpio/gpio_utils.h>
#define DEV_CFG(_dev) ((const struct mcux_igpio_config *)(_dev)->config)
#define DEV_DATA(_dev) ((struct mcux_igpio_data *)(_dev)->data)
struct mcux_igpio_config { struct mcux_igpio_config {
/* gpio_driver_config needs to be first */ /* gpio_driver_config needs to be first */
struct gpio_driver_config common; struct gpio_driver_config common;
GPIO_Type *base;
DEVICE_MMIO_NAMED_ROM(igpio_mmio);
const struct pinctrl_soc_pinmux *pin_muxes; const struct pinctrl_soc_pinmux *pin_muxes;
uint8_t mux_count; uint8_t mux_count;
}; };
@ -30,15 +36,23 @@ struct mcux_igpio_config {
struct mcux_igpio_data { struct mcux_igpio_data {
/* gpio_driver_data needs to be first */ /* gpio_driver_data needs to be first */
struct gpio_driver_data general; struct gpio_driver_data general;
DEVICE_MMIO_NAMED_RAM(igpio_mmio);
/* port ISR callback routine address */ /* port ISR callback routine address */
sys_slist_t callbacks; sys_slist_t callbacks;
}; };
static GPIO_Type *get_base(const struct device *dev)
{
return (GPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, igpio_mmio);
}
static int mcux_igpio_configure(const struct device *dev, static int mcux_igpio_configure(const struct device *dev,
gpio_pin_t pin, gpio_flags_t flags) gpio_pin_t pin, gpio_flags_t flags)
{ {
const struct mcux_igpio_config *config = dev->config; const struct mcux_igpio_config *config = dev->config;
GPIO_Type *base = config->base; GPIO_Type *base = get_base(dev);
struct pinctrl_soc_pin pin_cfg; struct pinctrl_soc_pin pin_cfg;
int cfg_idx = pin, i; int cfg_idx = pin, i;
@ -63,7 +77,7 @@ static int mcux_igpio_configure(const struct device *dev,
/* Set appropriate bits in pin configuration register */ /* Set appropriate bits in pin configuration register */
volatile uint32_t *gpio_cfg_reg = volatile uint32_t *gpio_cfg_reg =
(volatile uint32_t *)config->pin_muxes[cfg_idx].config_register; (volatile uint32_t *)(uintptr_t)config->pin_muxes[cfg_idx].config_register;
uint32_t reg = *gpio_cfg_reg; uint32_t reg = *gpio_cfg_reg;
#ifdef CONFIG_SOC_SERIES_IMXRT10XX #ifdef CONFIG_SOC_SERIES_IMXRT10XX
@ -204,8 +218,7 @@ static int mcux_igpio_configure(const struct device *dev,
static int mcux_igpio_port_get_raw(const struct device *dev, uint32_t *value) static int mcux_igpio_port_get_raw(const struct device *dev, uint32_t *value)
{ {
const struct mcux_igpio_config *config = dev->config; GPIO_Type *base = get_base(dev);
GPIO_Type *base = config->base;
*value = base->DR; *value = base->DR;
@ -216,8 +229,7 @@ static int mcux_igpio_port_set_masked_raw(const struct device *dev,
uint32_t mask, uint32_t mask,
uint32_t value) uint32_t value)
{ {
const struct mcux_igpio_config *config = dev->config; GPIO_Type *base = get_base(dev);
GPIO_Type *base = config->base;
base->DR = (base->DR & ~mask) | (mask & value); base->DR = (base->DR & ~mask) | (mask & value);
@ -227,8 +239,7 @@ static int mcux_igpio_port_set_masked_raw(const struct device *dev,
static int mcux_igpio_port_set_bits_raw(const struct device *dev, static int mcux_igpio_port_set_bits_raw(const struct device *dev,
uint32_t mask) uint32_t mask)
{ {
const struct mcux_igpio_config *config = dev->config; GPIO_Type *base = get_base(dev);
GPIO_Type *base = config->base;
GPIO_PortSet(base, mask); GPIO_PortSet(base, mask);
@ -238,8 +249,7 @@ static int mcux_igpio_port_set_bits_raw(const struct device *dev,
static int mcux_igpio_port_clear_bits_raw(const struct device *dev, static int mcux_igpio_port_clear_bits_raw(const struct device *dev,
uint32_t mask) uint32_t mask)
{ {
const struct mcux_igpio_config *config = dev->config; GPIO_Type *base = get_base(dev);
GPIO_Type *base = config->base;
GPIO_PortClear(base, mask); GPIO_PortClear(base, mask);
@ -249,8 +259,7 @@ static int mcux_igpio_port_clear_bits_raw(const struct device *dev,
static int mcux_igpio_port_toggle_bits(const struct device *dev, static int mcux_igpio_port_toggle_bits(const struct device *dev,
uint32_t mask) uint32_t mask)
{ {
const struct mcux_igpio_config *config = dev->config; GPIO_Type *base = get_base(dev);
GPIO_Type *base = config->base;
GPIO_PortToggle(base, mask); GPIO_PortToggle(base, mask);
@ -263,7 +272,7 @@ static int mcux_igpio_pin_interrupt_configure(const struct device *dev,
enum gpio_int_trig trig) enum gpio_int_trig trig)
{ {
const struct mcux_igpio_config *config = dev->config; const struct mcux_igpio_config *config = dev->config;
GPIO_Type *base = config->base; GPIO_Type *base = get_base(dev);
unsigned int key; unsigned int key;
uint8_t icr; uint8_t icr;
int shift; int shift;
@ -327,9 +336,8 @@ static int mcux_igpio_manage_callback(const struct device *dev,
static void mcux_igpio_port_isr(const struct device *dev) static void mcux_igpio_port_isr(const struct device *dev)
{ {
const struct mcux_igpio_config *config = dev->config;
struct mcux_igpio_data *data = dev->data; struct mcux_igpio_data *data = dev->data;
GPIO_Type *base = config->base; GPIO_Type *base = get_base(dev);
uint32_t int_flags; uint32_t int_flags;
int_flags = base->ISR; int_flags = base->ISR;
@ -375,11 +383,11 @@ static DEVICE_API(gpio, mcux_igpio_driver_api) = {
static int mcux_igpio_##n##_init(const struct device *dev); \ static int mcux_igpio_##n##_init(const struct device *dev); \
\ \
static const struct mcux_igpio_config mcux_igpio_##n##_config = {\ static const struct mcux_igpio_config mcux_igpio_##n##_config = {\
DEVICE_MMIO_NAMED_ROM_INIT(igpio_mmio, DT_DRV_INST(n)), \
.common = { \ .common = { \
.port_pin_mask = GPIO_DT_INST_PORT_PIN_MASK_NGPIOS_EXC(\ .port_pin_mask = GPIO_DT_INST_PORT_PIN_MASK_NGPIOS_EXC(\
n, DT_INST_PROP(n, ngpios)),\ n, DT_INST_PROP(n, ngpios)),\
}, \ }, \
.base = (GPIO_Type *)DT_INST_REG_ADDR(n), \
MCUX_IGPIO_PIN_INIT(n) \ MCUX_IGPIO_PIN_INIT(n) \
}; \ }; \
\ \
@ -402,6 +410,8 @@ static DEVICE_API(gpio, mcux_igpio_driver_api) = {
IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 1), \ IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 1), \
(MCUX_IGPIO_IRQ_INIT(n, 1);)) \ (MCUX_IGPIO_IRQ_INIT(n, 1);)) \
\ \
DEVICE_MMIO_NAMED_MAP(dev, igpio_mmio, K_MEM_CACHE_NONE | K_MEM_DIRECT_MAP); \
\
return 0; \ return 0; \
} }