arch: remove CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION

`CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION` had been deprecated since
#66877 for 2 releases, interrupt controller drivers should have been
updated to use the new `IRQ_PARENT_ENTRY_DEFINE()` macro. Remove it.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>

arch/common/CMakeLists.txt

@@ -27,8 +27,6 @@ zephyr_library_sources_ifdef(
   multilevel_irq.c
   )
 
-zephyr_library_sources_ifdef(CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION multilevel_irq_legacy.c)
-
 zephyr_library_sources_ifdef(CONFIG_SHARED_INTERRUPTS shared_irq.c)
 
 if(NOT CONFIG_ARCH_HAS_TIMING_FUNCTIONS AND

arch/common/Kconfig

@@ -16,21 +16,6 @@ config SEMIHOST
 	  This option is compatible with hardware and with QEMU, through the
 	  (automatic) use of the -semihosting-config switch when invoking it.
 
-config LEGACY_MULTI_LEVEL_TABLE_GENERATION
-	bool "Auto generates the multi-level interrupt LUT (deprecated)"
-	default y
-	select DEPRECATED
-	depends on MULTI_LEVEL_INTERRUPTS
-	depends on !PLIC
-	depends on !NXP_IRQSTEER
-	depends on !RV32M1_INTMUX
-	depends on !CAVS_ICTL
-	depends on !DW_ICTL_ACE
-	depends on !DW_ICTL
-	help
-	  A make-shift Kconfig to continue generating the multi-level interrupt LUT
-	  with the legacy way using DT macros.
-
 config ISR_TABLE_SHELL
 	bool "Shell command to dump the ISR tables"
 	depends on GEN_SW_ISR_TABLE

arch/common/multilevel_irq_legacy.c

@@ -1,72 +0,0 @@
-/*
- * Copyright (c) 2018 Intel Corporation.
- * Copyright (c) 2024 Meta.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <zephyr/sw_isr_table.h>
-#include <zephyr/sys/util.h>
-
-/**
- * @file
- * @brief This file houses the deprecated legacy macros-generated multi-level interrupt lookup
- * table code, compiled when `CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION` is enabled.
- */
-
-/*
- * Insert code if the node_id is an interrupt controller
- */
-#define Z_IF_DT_IS_INTC(node_id, code)                                                             \
-	IF_ENABLED(DT_NODE_HAS_PROP(node_id, interrupt_controller), (code))
-
-/*
- * Expands to node_id if its IRQN is equal to `_irq`, nothing otherwise
- * This only works for `_irq` between 0 & 4095, see `IS_EQ`
- */
-#define Z_IF_DT_INTC_IRQN_EQ(node_id, _irq) IF_ENABLED(IS_EQ(DT_IRQ(node_id, irq), _irq), (node_id))
-
-/*
- * Expands to node_id if it's an interrupt controller & its IRQN is `irq`, or nothing otherwise
- */
-#define Z_DT_INTC_GET_IRQN(node_id, _irq)                                                          \
-	Z_IF_DT_IS_INTC(node_id, Z_IF_DT_INTC_IRQN_EQ(node_id, _irq))
-
-/**
- * Loop through child of "/soc" and get root interrupt controllers with `_irq` as IRQN,
- * this assumes only one device has the IRQN
- * @param _irq irq number
- * @return node_id(s) that has the `_irq` number, or empty if none of them has the `_irq`
- */
-#define INTC_DT_IRQN_GET(_irq)                                                                     \
-	DT_FOREACH_CHILD_STATUS_OKAY_VARGS(DT_PATH(soc), Z_DT_INTC_GET_IRQN, _irq)
-
-#define INIT_IRQ_PARENT_OFFSET_2ND(n, d, i, o)                                                     \
-	IRQ_PARENT_ENTRY_DEFINE(intc_l2_##n, DEVICE_DT_GET_OR_NULL(d), i, o, 2)
-
-#define IRQ_INDEX_TO_OFFSET(i, base) (base + i * CONFIG_MAX_IRQ_PER_AGGREGATOR)
-
-#define CAT_2ND_LVL_LIST(i, base)                                                                  \
-	INIT_IRQ_PARENT_OFFSET_2ND(i, INTC_DT_IRQN_GET(CONFIG_2ND_LVL_INTR_0##i##_OFFSET),         \
-				   CONFIG_2ND_LVL_INTR_0##i##_OFFSET,                              \
-				   IRQ_INDEX_TO_OFFSET(i, base))
-
-LISTIFY(CONFIG_NUM_2ND_LEVEL_AGGREGATORS, CAT_2ND_LVL_LIST, (;), CONFIG_2ND_LVL_ISR_TBL_OFFSET);
-
-#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
-
-BUILD_ASSERT((CONFIG_NUM_3RD_LEVEL_AGGREGATORS * CONFIG_MAX_IRQ_PER_AGGREGATOR) <=
-		     BIT(CONFIG_3RD_LEVEL_INTERRUPT_BITS),
-	     "L3 bits not enough to cover the number of L3 IRQs");
-
-#define INIT_IRQ_PARENT_OFFSET_3RD(n, d, i, o)                                                     \
-	IRQ_PARENT_ENTRY_DEFINE(intc_l3_##n, DEVICE_DT_GET_OR_NULL(d), i, o, 3)
-
-#define CAT_3RD_LVL_LIST(i, base)                                                                  \
-	INIT_IRQ_PARENT_OFFSET_3RD(i, INTC_DT_IRQN_GET(CONFIG_3RD_LVL_INTR_0##i##_OFFSET),         \
-				   CONFIG_3RD_LVL_INTR_0##i##_OFFSET,                              \
-				   IRQ_INDEX_TO_OFFSET(i, base))
-
-LISTIFY(CONFIG_NUM_3RD_LEVEL_AGGREGATORS, CAT_3RD_LVL_LIST, (;), CONFIG_3RD_LVL_ISR_TBL_OFFSET);
-
-#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */

soc/mediatek/mt8xxx/mt8196/Kconfig.defconfig

@@ -3,9 +3,6 @@
 
 if SOC_MT8196
 
-config LEGACY_MULTI_LEVEL_TABLE_GENERATION
-	default n
-
 config NUM_2ND_LEVEL_AGGREGATORS
 	default 2
 

tests/drivers/interrupt_controller/multi_level_backend/testcase.yaml

@@ -5,7 +5,7 @@ common:
   tags:
     - drivers
     - interrupt
-  filter: CONFIG_MULTI_LEVEL_INTERRUPTS and not CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION
+  filter: CONFIG_MULTI_LEVEL_INTERRUPTS
   platform_allow:
     - m2gl025_miv/miv
     - qemu_riscv32/qemu_virt_riscv32