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dts: arm: nxp: nxp_imx8ml_m7: Add ECSPI instances

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Add device tree instances for ECSPI peripherals and update SoC code to
enable clocks.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This commit is contained in:
Pieter De Gendt 2024-02-20 09:37:17 +01:00 committed by Anas Nashif
parent fcc729f240
commit 5944fb38bf
2 changed files with 52 additions and 0 deletions
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29
dts/arm/nxp/nxp_imx8ml_m7.dtsi
View file

@ -181,6 +181,35 @@
status = "disabled"; status = "disabled";
}; };
ecspi1: spi@30820000 {
compatible = "nxp,imx-ecspi";
reg = <0x30820000 DT_SIZE_K(64)>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <31 3>;
clocks = <&ccm IMX_CCM_ECSPI1_CLK 0 0>;
status = "disabled";
};
ecspi2: spi@30830000 {
compatible = "nxp,imx-ecspi";
reg = <0x30830000 DT_SIZE_K(64)>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <32 3>;
clocks = <&ccm IMX_CCM_ECSPI2_CLK 0 0>;
status = "disabled";
};
ecspi3: spi@30840000 {
compatible = "nxp,imx-ecspi";
reg = <0x30840000 DT_SIZE_K(64)>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <33 3>;
clocks = <&ccm IMX_CCM_ECSPI3_CLK 0 0>;
status = "disabled";
};
}; };
}; };

23
soc/nxp/imx/imx8m/m7/soc.c
View file

@ -131,6 +131,29 @@ static void SOC_ClockInit(void)
/* Set root clock to 80MHZ/ 1= 80MHZ */ /* Set root clock to 80MHZ/ 1= 80MHZ */
CLOCK_SetRootDivider(kCLOCK_RootUart4, 1U, 1U); CLOCK_SetRootDivider(kCLOCK_RootUart4, 1U, 1U);
#endif #endif
#endif
#if defined(CONFIG_SPI_MCUX_ECSPI)
#if DT_NODE_HAS_STATUS(DT_NODELABEL(ecspi1), okay)
/* Set ECSPI1 source to SYSTEM PLL1 800MHZ */
CLOCK_SetRootMux(kCLOCK_RootEcspi1, kCLOCK_EcspiRootmuxSysPll1);
/* Set root clock to 800MHZ / 10 = 80MHZ */
CLOCK_SetRootDivider(kCLOCK_RootEcspi1, 2U, 5U);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(ecspi2), okay)
/* Set ECSPI2 source to SYSTEM PLL1 800MHZ */
CLOCK_SetRootMux(kCLOCK_RootEcspi2, kCLOCK_EcspiRootmuxSysPll1);
/* Set root clock to 800MHZ / 10 = 80MHZ */
CLOCK_SetRootDivider(kCLOCK_RootEcspi2, 2U, 5U);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(ecspi3), okay)
/* Set ECSPI3 source to SYSTEM PLL1 800MHZ */
CLOCK_SetRootMux(kCLOCK_RootEcspi3, kCLOCK_EcspiRootmuxSysPll1);
/* Set root clock to 800MHZ / 10 = 80MHZ */
CLOCK_SetRootDivider(kCLOCK_RootEcspi3, 2U, 5U);
#endif
#endif #endif
CLOCK_EnableClock(kCLOCK_Rdc); /* Enable RDC clock */ CLOCK_EnableClock(kCLOCK_Rdc); /* Enable RDC clock */