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arch: riscv enable flash config

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For RISCV arch, enable FLASH_SIZE and FLASH_BASE_ADDRESS config.
To avoid duplicated work, remove flash config from RISCV soc.

Signed-off-by: Jonas Otto <jonas@jonasotto.com>
This commit is contained in:
Jonas Otto 2023-02-20 10:06:37 +08:00 committed by Fabio Baltieri
parent 30e0fa82f8
commit 60b8773491
5 changed files with 2 additions and 23 deletions
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4
arch/Kconfig
View file

@ -203,7 +203,7 @@ config SRAM_BASE_ADDRESS
/chosen/zephyr,sram in devicetree. The user should generally avoid
changing it via menuconfig or in configuration files.
if ARC || ARM || ARM64 || NIOS2 || X86
if ARC || ARM || ARM64 || NIOS2 || X86 || RISCV
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
@ -224,7 +224,7 @@ config FLASH_BASE_ADDRESS
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
endif # ARM || ARM64 || ARC || NIOS2 || X86
endif # ARM || ARM64 || ARC || NIOS2 || X86 || RISCV
if ARCH_HAS_TRUSTED_EXECUTION

10
soc/riscv/openisa_rv32m1/Kconfig.defconfig
View file

@ -119,14 +119,4 @@ config RV32M1_INTMUX_CHANNEL_7
endif # MULTI_LEVEL_INTERRUPTS
if FLASH
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
endif # FLASH
endif # SOC_OPENISA_RV32M1_RISCV32

3
soc/riscv/riscv-privilege/gd32vf103/Kconfig.defconfig.gd32vf103
View file

@ -34,9 +34,6 @@ config NUM_IRQS
default 87 if NUCLEI_ECLIC
default 16 if !NUCLEI_ECLIC
config FLASH_BASE_ADDRESS
default $(dt_node_reg_addr_hex,flash0@8000000)
config 2ND_LEVEL_INTERRUPTS
default y

4
soc/riscv/riscv-privilege/opentitan/Kconfig.defconfig.series
View file

@ -27,8 +27,4 @@ config 2ND_LVL_ISR_TBL_OFFSET
config NUM_IRQS
default 216
config FLASH_BASE_ADDRESS
hex
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
endif # SOC_SERIES_RISCV_OPENTITAN

4
soc/riscv/riscv-privilege/telink_b91/Kconfig.soc
View file

@ -38,7 +38,3 @@ config SOC_RISCV_TELINK_B91
select INCLUDE_RESET_VECTOR
endchoice
config FLASH_BASE_ADDRESS
hex
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))