adafruit-mirror/zephyr
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions 9

ITE: drivers/i2c: it8xxx2: move pinctrls macro to soc_dt.h

Browse source 
This PR will change accessing the related pinctrl macro from soc_dt.h
And the pinctrl of SCL and SDA were got from pinctrl-0 and pinctrl-1,
respectively. Change it to get from pinctrl-0 only.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit is contained in:
Tim Lin 2021-08-11 08:22:14 +08:00 committed by Christopher Friedt
parent fee5a50652
commit 6a1262198a
3 changed files with 78 additions and 71 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

114
drivers/i2c/i2c_ite_it8xxx2.c
View file

@ -14,6 +14,7 @@
LOG_MODULE_REGISTER(i2c_ite_it8xxx2);
#include "i2c-priv.h"
#include <soc.h>
#include <soc_dt.h>
#include <sys/util.h>
#define DEV_CFG(dev) \
@ -21,42 +22,41 @@
#define DEV_DATA(dev) \
((struct i2c_it8xxx2_data * const)(dev)->data)
#define DEV_CLK_PINMUX(idx) DEVICE_DT_GET(DT_PHANDLE \
(DT_NODELABEL(pinctrl_i2c_clk##idx), pinctrls))
#define DEV_DATA_PINMUX(idx) DEVICE_DT_GET(DT_PHANDLE \
(DT_NODELABEL(pinctrl_i2c_data##idx), pinctrls))
#define DEV_CLK_PIN(idx) DT_PHA(DT_PHANDLE_BY_IDX \
(DT_DRV_INST(idx), pinctrl_0, 0), pinctrls, pin)
#define DEV_DATA_PIN(idx) DT_PHA(DT_PHANDLE_BY_IDX \
(DT_DRV_INST(idx), pinctrl_1, 0), pinctrls, pin)
#define DEV_CLK_ALT_FUNC(idx) DT_PHA(DT_PHANDLE_BY_IDX \
(DT_DRV_INST(idx), pinctrl_0, 0), pinctrls, alt_func)
#define DEV_DATA_ALT_FUNC(idx) DT_PHA(DT_PHANDLE_BY_IDX \
(DT_DRV_INST(idx), pinctrl_1, 0), pinctrls, alt_func)
#define I2C_STANDARD_PORT_COUNT 3
/* Default PLL frequency. */
#define PLL_CLOCK 48000000
/*
* Structure i2c_alts_cfg is about the alternate function
* setting of i2c, this config will be used at initial
* time and recover bus.
*/
struct i2c_alts_cfg {
/* Pinmux control group */
const struct device *pinctrls;
/* GPIO pin */
uint8_t pin;
/* Alternate function */
uint8_t alt_fun;
};
struct i2c_it8xxx2_config {
void (*irq_config_func)(void);
uint32_t bitrate;
uint8_t *base;
uint8_t i2c_irq_base;
uint8_t port;
/* Pinmux control group */
const struct device *clk_pinctrls;
const struct device *data_pinctrls;
/* GPIO pin */
uint8_t clk_pin;
uint8_t data_pin;
/* Alternate function */
uint8_t clk_alt_fun;
uint8_t data_alt_fun;
/* I2C alternate configuration */
const struct i2c_alts_cfg *alts_list;
/* GPIO handle */
const struct device *gpio_dev;
};
enum i2c_pin_fun {
SCL = 0,
SDA,
};
enum i2c_ch_status {
I2C_CH_NORMAL = 0,
I2C_CH_REPEAT_START,
@ -936,10 +936,14 @@ static int i2c_it8xxx2_init(const struct device *dev)
return error;
}
/* The pin is set to I2C alternate function of clock */
pinmux_pin_set(config->clk_pinctrls, config->clk_pin, config->clk_alt_fun);
/* The pin is set to I2C alternate function of data */
pinmux_pin_set(config->data_pinctrls, config->data_pin, config->data_alt_fun);
/* The pin is set to I2C alternate function of SCL */
pinmux_pin_set(config->alts_list[SCL].pinctrls,
config->alts_list[SCL].pin,
config->alts_list[SCL].alt_fun);
/* The pin is set to I2C alternate function of SDA */
pinmux_pin_set(config->alts_list[SDA].pinctrls,
config->alts_list[SDA].pin,
config->alts_list[SDA].alt_fun);
return 0;
}
@ -949,46 +953,55 @@ static int i2c_it8xxx2_recover_bus(const struct device *dev)
const struct i2c_it8xxx2_config *config = DEV_CFG(dev);
int i;
/* Set clock of I2C as GPIO pin */
pinmux_pin_input_enable(config->clk_pinctrls, config->clk_pin,
/* Set SCL of I2C as GPIO pin */
pinmux_pin_input_enable(config->alts_list[SCL].pinctrls,
config->alts_list[SCL].pin,
PINMUX_OUTPUT_ENABLED);
/* Set data of I2C as GPIO pin */
pinmux_pin_input_enable(config->data_pinctrls, config->data_pin,
/* Set SDA of I2C as GPIO pin */
pinmux_pin_input_enable(config->alts_list[SDA].pinctrls,
config->alts_list[SDA].pin,
PINMUX_OUTPUT_ENABLED);
gpio_pin_set(config->gpio_dev, config->clk_pin, 1);
gpio_pin_set(config->gpio_dev, config->data_pin, 1);
/* Pull SCL and SDA pin to high */
gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 1);
gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 1);
k_msleep(1);
/* Start condition */
gpio_pin_set(config->gpio_dev, config->data_pin, 0);
gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 0);
k_msleep(1);
gpio_pin_set(config->gpio_dev, config->clk_pin, 0);
gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 0);
k_msleep(1);
/* 9 cycles of SCL with SDA held high */
for (i = 0; i < 9; i++) {
gpio_pin_set(config->gpio_dev, config->data_pin, 1);
gpio_pin_set(config->gpio_dev, config->clk_pin, 1);
/* SDA */
gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 1);
/* SCL */
gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 1);
k_msleep(1);
gpio_pin_set(config->gpio_dev, config->clk_pin, 0);
/* SCL */
gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 0);
k_msleep(1);
}
gpio_pin_set(config->gpio_dev, config->data_pin, 0);
/* SDA */
gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 0);
k_msleep(1);
/* Stop condition */
gpio_pin_set(config->gpio_dev, config->clk_pin, 1);
gpio_pin_set(config->gpio_dev, config->alts_list[SCL].pin, 1);
k_msleep(1);
gpio_pin_set(config->gpio_dev, config->data_pin, 1);
gpio_pin_set(config->gpio_dev, config->alts_list[SDA].pin, 1);
k_msleep(1);
/* Set GPIO back to I2C alternate function of clock */
pinmux_pin_set(config->clk_pinctrls, config->clk_pin,
config->clk_alt_fun);
/* Set GPIO back to I2C alternate function of data */
pinmux_pin_set(config->data_pinctrls, config->data_pin,
config->data_alt_fun);
/* Set GPIO back to I2C alternate function of SCL */
pinmux_pin_set(config->alts_list[SCL].pinctrls,
config->alts_list[SCL].pin,
config->alts_list[SCL].alt_fun);
/* Set GPIO back to I2C alternate function of SDA */
pinmux_pin_set(config->alts_list[SDA].pinctrls,
config->alts_list[SDA].pin,
config->alts_list[SDA].alt_fun);
/* reset i2c port */
i2c_reset(dev);
@ -1006,6 +1019,8 @@ static const struct i2c_driver_api i2c_it8xxx2_driver_api = {
#define I2C_ITE_IT8XXX2_INIT(idx) \
static void i2c_it8xxx2_config_func_##idx(void); \
static const struct i2c_alts_cfg i2c_alts_##idx[DT_INST_PROP_LEN \
(idx, pinctrl_0)] = IT8XXX2_DT_ALT_ITEMS_LIST(idx); \
\
static const struct i2c_it8xxx2_config i2c_it8xxx2_cfg_##idx = { \
.base = (uint8_t *)(DT_INST_REG_ADDR(idx)), \
@ -1013,12 +1028,7 @@ static const struct i2c_driver_api i2c_it8xxx2_driver_api = {
.bitrate = DT_INST_PROP(idx, clock_frequency), \
.i2c_irq_base = DT_INST_IRQN(idx), \
.port = DT_INST_PROP(idx, port_num), \
.clk_pinctrls = DEV_CLK_PINMUX(idx), \
.data_pinctrls = DEV_DATA_PINMUX(idx), \
.clk_pin = DEV_CLK_PIN(idx), \
.data_pin = DEV_DATA_PIN(idx), \
.clk_alt_fun = DEV_CLK_ALT_FUNC(idx), \
.data_alt_fun = DEV_DATA_ALT_FUNC(idx), \
.alts_list = i2c_alts_##idx, \
.gpio_dev = DEVICE_DT_GET(DT_INST_PHANDLE(idx, gpio_dev)), \
}; \
\

11
dts/bindings/i2c/ite,it8xxx2-i2c.yaml
View file

@ -28,11 +28,8 @@ properties:
description: Get the handle of the GPIO device
pinctrl-0:
type: phandle
type: phandles
required: true
description: Configuration of I2C clock pinmux controller
pinctrl-1:
type: phandle
required: true
description: Configuration of I2C data pinmux controller
description: Configuration of I2C SCL and SDA pinmux controller.
The SCL pin must be specified first and the SDA pin
second in the pinctrl-0 array.

24
dts/riscv/it8xxx2.dtsi
View file

@ -602,8 +602,8 @@
label = "I2C_0";
port-num = <0>;
gpio-dev = <&gpiob>;
pinctrl-0 = <&pinctrl_i2c_clk0>; /* GPB3 */
pinctrl-1 = <&pinctrl_i2c_data0>; /* GPB4 */
pinctrl-0 = <&pinctrl_i2c_clk0 /* GPB3 */
&pinctrl_i2c_data0>; /* GPB4 */
};
i2c1: i2c@f01c80 {
compatible = "ite,it8xxx2-i2c";
@ -616,8 +616,8 @@
label = "I2C_1";
port-num = <1>;
gpio-dev = <&gpioc>;
pinctrl-0 = <&pinctrl_i2c_clk1>; /* GPC1 */
pinctrl-1 = <&pinctrl_i2c_data1>; /* GPC2 */
pinctrl-0 = <&pinctrl_i2c_clk1 /* GPC1 */
&pinctrl_i2c_data1>; /* GPC2 */
};
i2c2: i2c@f01cc0 {
compatible = "ite,it8xxx2-i2c";
@ -630,8 +630,8 @@
label = "I2C_2";
port-num = <2>;
gpio-dev = <&gpiof>;
pinctrl-0 = <&pinctrl_i2c_clk2>; /* GPF6 */
pinctrl-1 = <&pinctrl_i2c_data2>; /* GPF7 */
pinctrl-0 = <&pinctrl_i2c_clk2 /* GPF6 */
&pinctrl_i2c_data2>; /* GPF7 */
};
i2c3: i2c@f03680 {
compatible = "ite,it8xxx2-i2c";
@ -644,8 +644,8 @@
label = "I2C_3";
port-num = <3>;
gpio-dev = <&gpioh>;
pinctrl-0 = <&pinctrl_i2c_clk3>; /* GPH1 */
pinctrl-1 = <&pinctrl_i2c_data3>; /* GPH2 */
pinctrl-0 = <&pinctrl_i2c_clk3 /* GPH1 */
&pinctrl_i2c_data3>; /* GPH2 */
};
i2c4: i2c@f03500 {
compatible = "ite,it8xxx2-i2c";
@ -658,8 +658,8 @@
label = "I2C_4";
port-num = <4>;
gpio-dev = <&gpioe>;
pinctrl-0 = <&pinctrl_i2c_clk4>; /* GPE0 */
pinctrl-1 = <&pinctrl_i2c_data4>; /* GPE7 */
pinctrl-0 = <&pinctrl_i2c_clk4 /* GPE0 */
&pinctrl_i2c_data4>; /* GPE7 */
};
i2c5: i2c@f03580 {
compatible = "ite,it8xxx2-i2c";
@ -672,8 +672,8 @@
label = "I2C_5";
port-num = <5>;
gpio-dev = <&gpioa>;
pinctrl-0 = <&pinctrl_i2c_clk5>; /* GPA4 */
pinctrl-1 = <&pinctrl_i2c_data5>; /* GPA5 */
pinctrl-0 = <&pinctrl_i2c_clk5 /* GPA4 */
&pinctrl_i2c_data5>; /* GPA5 */
};
ecpm: clock-controller@f01e00 {