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boards: nxp: mimxrt1180_evk: enable lpspi3 and edma4 instance support

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Add pinctrl and dma channel/mux information for lpspi3 on cm33/cm7 cores.
Set dma4 status is OK.
Add pinctrl for lpuart3

tests: driver: spi: support spi_loopback case on MIMXRT1180_EVK
Add .config/.overlay files for cm33/cm7 cores
Link to ocram1 as RAM region on cm7 core
Link to dtcm as RAM region on cm33 core

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
This commit is contained in:
Lucien Zhao 2024-08-22 15:12:29 +08:00 committed by Benjamin Cabé
parent 1f0bea6c08
commit 6c24c2e0a0
11 changed files with 150 additions and 0 deletions
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12
boards/nxp/mimxrt1180_evk/doc/index.rst
View file

@ -120,6 +120,10 @@ configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| I3C | on-chip | i3c |
+-----------+------------+-------------------------------------+
| DMA | on-chip | dma |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33_defconfig`
@ -143,6 +147,14 @@ The MIMXRT1180 SoC has six pairs of pinmux/gpio controllers.
+---------------+-----------------+---------------------------+
| GPIO_AON_09 | LPUART1_RX | UART Console |
+---------------+-----------------+---------------------------+
| GPIO_SD_B1_00 | SPI1_CS0 | spi |
+---------------+---------------------------------------------+
| GPIO_SD_B1_01 | SPI1_CLK | spi |
+---------------+---------------------------------------------+
| GPIO_SD_B1_02 | SPI1_SDO | spi |
+---------------+---------------------------------------------+
| GPIO_SD_B1_03 | SPI1_SDI | spi |
+---------------+---------------------------------------------+
System Clock
============

23
boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi
View file

@ -73,6 +73,29 @@
};
};
pinmux_lpuart3: pinmux_lpuart3 {
group0 {
pinmux = <&iomuxc_gpio_ad_14_lpuart3_rxd>,
<&iomuxc_gpio_ad_13_lpuart3_txd>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpuart3_sleep: pinmux_lpuart3_sleep {
group0 {
pinmux = <&iomuxc_gpio_ad_14_gpio4_io14>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
group1 {
pinmux = <&iomuxc_gpio_ad_13_lpuart3_txd>;
drive-strength = "high";
slew-rate = "fast";
};
};
/* Connected to FXLS8974 */
pinmux_lpi2c2: pinmux_lpi2c2 {
group0 {

13
boards/nxp/mimxrt1180_evk/mimxrt1180_evk.dtsi
View file

@ -47,6 +47,12 @@
pinctrl-names = "default", "sleep";
};
&lpuart3 {
pinctrl-0 = <&pinmux_lpuart3>;
pinctrl-1 = <&pinmux_lpuart3_sleep>;
pinctrl-names = "default", "sleep";
};
&user_button {
status = "okay";
};
@ -152,3 +158,10 @@
p3t1755dp_ard_i3c_interface: &i3c2 {};
p3t1755dp_ard_i2c_interface: &lpi2c2 {};
&lpspi3 {
dmas = <&edma4 1 13>, <&edma4 2 12>;
dma-names = "rx", "tx";
pinctrl-0 = <&pinmux_lpspi3>;
pinctrl-names = "default";
};

12
boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.dts
View file

@ -79,3 +79,15 @@
&i3c2 {
status = "okay";
};
&lpspi3 {
status = "okay";
};
&edma3 {
status = "okay";
};
&edma4 {
status = "okay";
};

2
boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.yaml
View file

@ -25,4 +25,6 @@ supported:
- pwm
- uart
- i3c
- dma
- spi
vendor: nxp

12
boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.dts
View file

@ -51,3 +51,15 @@
&i3c2 {
status = "okay";
};
&lpspi3 {
status = "okay";
};
&edma3 {
status = "okay";
};
&edma4 {
status = "okay";
};

2
boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.yaml
View file

@ -24,4 +24,6 @@ supported:
- pwm
- uart
- i3c
- dma
- spi
vendor: nxp

8
tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm33.conf Normal file
View file

@ -0,0 +1,8 @@
#
# Copyright 2024 NXP
#
# SPDX-License-Identifier: Apache-2.0
#
CONFIG_SPI_MCUX_LPSPI_DMA=y
CONFIG_SPI_ASYNC=n
CONFIG_DMA_MCUX_USE_DTCM_FOR_DMA_DESCRIPTORS=n

26
tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm33.overlay Normal file
View file

@ -0,0 +1,26 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/* To test this sample, connect J44.8 <-> J44.10 */
/ {
chosen {
zephyr,sram = &dtcm;
};
};
&lpspi3 {
slow@0 {
compatible = "test-spi-loopback-slow";
reg = <0>;
spi-max-frequency = <500000>;
};
fast@0 {
compatible = "test-spi-loopback-fast";
reg = <0>;
spi-max-frequency = <16000000>;
};
};

8
tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm7.conf Normal file
View file

@ -0,0 +1,8 @@
#
# Copyright 2024 NXP
#
# SPDX-License-Identifier: Apache-2.0
#
CONFIG_SPI_MCUX_LPSPI_DMA=y
CONFIG_SPI_ASYNC=n
CONFIG_DMA_MCUX_USE_DTCM_FOR_DMA_DESCRIPTORS=n

32
tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm7.overlay Normal file
View file

@ -0,0 +1,32 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/* To test this sample, connect J44.8 <-> J44.10 */
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
/ {
chosen {
zephyr,sram = &ocram1;
};
};
&ocram1 {
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
};
&lpspi3 {
slow@0 {
compatible = "test-spi-loopback-slow";
reg = <0>;
spi-max-frequency = <500000>;
};
fast@0 {
compatible = "test-spi-loopback-fast";
reg = <0>;
spi-max-frequency = <16000000>;
};
};