dts: atmel: sam0: Normalize dtsi nodes

Keep a consistent order on the nodes definitions to make it easy to read
between all the SoC series.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit is contained in:
Gerson Fernando Budke 2024-12-14 13:00:44 +01:00 committed by Benjamin Cabé
parent 233095c3f4
commit 6f1f598a72
10 changed files with 166 additions and 78 deletions

View file

@ -15,15 +15,17 @@
soc {
adc1: adc@42004800 {
compatible = "atmel,sam0-adc";
status = "disabled";
reg = <0x42004800 0x30>;
interrupts = <26 0>;
interrupt-names = "resrdy";
clocks = <&gclk 34>, <&mclk 0x1c 18>;
clock-names = "GCLK", "MCLK";
status = "disabled";
#io-channel-cells = <1>;
gclk = <0>;
prescaler = <4>;
#io-channel-cells = <1>;
};
sercom4: sercom@42001400 {
@ -51,9 +53,10 @@
interrupt-names = "int0";
clocks = <&gclk 26>, <&mclk 0x10 8>;
clock-names = "GCLK", "MCLK";
status = "disabled";
bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
divider = <12>;
status = "disabled";
};
can1: can@42002000 {
@ -63,9 +66,10 @@
interrupt-names = "int0";
clocks = <&gclk 27>, <&mclk 0x10 9>;
clock-names = "GCLK", "MCLK";
status = "disabled";
bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
divider = <12>;
status = "disabled";
};
};
};

View file

@ -25,9 +25,10 @@
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m0+";
reg = <0>;
device_type = "cpu";
};
};
@ -63,13 +64,15 @@
compatible = "atmel,sam0-nvmctrl";
reg = <0x41004000 0x22>;
interrupts = <6 0>;
lock-regions = <16>;
#address-cells = <1>;
#size-cells = <1>;
lock-regions = <16>;
flash0: flash@0 {
compatible = "soc-nv-flash";
write-block-size = <4>;
};
};
@ -77,12 +80,14 @@
mclk: mclk@40000800 {
compatible = "atmel,samc2x-mclk";
reg = <0x40000800 0x400>;
#clock-cells = <2>;
};
gclk: gclk@40001c00 {
compatible = "atmel,samc2x-gclk";
reg = <0x40001c00 0x400>;
#clock-cells = <1>;
};
@ -107,20 +112,23 @@
compatible = "atmel,sam0-dmac";
reg = <0x41006000 0x50>;
interrupts = <7 0>;
#dma-cells = <2>;
};
adc0: adc@42004400 {
compatible = "atmel,sam0-adc";
status = "disabled";
reg = <0x42004400 0x30>;
interrupts = <25 0>;
interrupt-names = "resrdy";
clocks = <&gclk 33>, <&mclk 0x1c 17>;
clock-names = "GCLK", "MCLK";
status = "disabled";
#io-channel-cells = <1>;
gclk = <0>;
prescaler = <4>;
#io-channel-cells = <1>;
};
sercom0: sercom@42000400 {
@ -194,32 +202,39 @@
pinctrl: pinctrl@41000000 {
compatible = "atmel,sam0-pinctrl";
ranges = <0x41000000 0x41000000 0x180>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x41000000 0x41000000 0x180>;
porta: gpio@41000000 {
compatible = "atmel,sam0-gpio";
reg = <0x41000000 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
portb: gpio@41000080 {
compatible = "atmel,sam0-gpio";
reg = <0x41000080 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
portc: gpio@41000100 {
compatible = "atmel,sam0-gpio";
reg = <0x41000100 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
};
@ -227,8 +242,9 @@
compatible = "atmel,sam0-rtc";
reg = <0x40002400 0x1C>;
interrupts = <3 0>;
clock-generator = <0>;
status = "disabled";
clock-generator = <0>;
};
};
};

View file

@ -14,9 +14,10 @@
soc {
usb0: usb@41005000 {
compatible = "atmel,sam0-usb";
status = "disabled";
reg = <0x41005000 0x1000>;
interrupts = <7 0>;
status = "disabled";
num-bidir-endpoints = <8>;
};
@ -24,6 +25,7 @@
compatible = "atmel,sam0-dmac";
reg = <0x41004800 0x50>;
interrupts = <6 0>;
#dma-cells = <2>;
};

View file

@ -25,9 +25,10 @@
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m0+";
reg = <0>;
device_type = "cpu";
};
};
@ -63,13 +64,15 @@
compatible = "atmel,sam0-nvmctrl";
reg = <0x41004000 0x22>;
interrupts = <5 0>;
lock-regions = <16>;
#address-cells = <1>;
#size-cells = <1>;
lock-regions = <16>;
flash0: flash@0 {
compatible = "soc-nv-flash";
write-block-size = <4>;
};
};
@ -78,12 +81,14 @@
compatible = "atmel,samd2x-pm";
reg = <0x40000400 0x400>;
interrupts = <0 0>;
#clock-cells = <2>;
};
gclk: gclk@40000c00 {
compatible = "atmel,samd2x-gclk";
reg = <0x40000c00 0x400>;
#clock-cells = <1>;
};
@ -148,29 +153,34 @@
tc4: tc@42003000 {
compatible = "atmel,sam0-tc32";
reg = <0x42003000 0x20>;
status = "disabled";
};
pinctrl: pinctrl@41004400 {
compatible = "atmel,sam0-pinctrl";
ranges = <0x41004400 0x41004400 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x41004400 0x41004400 0x100>;
porta: gpio@41004400 {
compatible = "atmel,sam0-gpio";
reg = <0x41004400 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
portb: gpio@41004480 {
compatible = "atmel,sam0-gpio";
reg = <0x41004480 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
};
@ -178,27 +188,30 @@
compatible = "atmel,sam0-rtc";
reg = <0x40001400 0x1C>;
interrupts = <3 0>;
clock-generator = <0>;
status = "disabled";
clock-generator = <0>;
};
adc: adc@42004000 {
compatible = "atmel,sam0-adc";
reg = <0x42004000 0x2B>;
#io-channel-cells = <1>;
/*
* 2.1 MHz max, so clock it with the
* 8 MHz GCLK / 4 = 2 MHz
*/
gclk = <3>;
prescaler = <4>;
#io-channel-cells = <1>;
};
dac0: dac@42004800 {
compatible = "atmel,sam0-dac";
status = "disabled";
reg = <0x42004800 0x10>;
status = "disabled";
#io-channel-cells = <0>;
};
};

View file

@ -20,12 +20,14 @@
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m4f";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
device_type = "cpu";
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
@ -91,12 +93,14 @@
mclk: mclk@40000800 {
compatible = "atmel,samd5x-mclk";
reg = <0x40000800 0x400>;
#clock-cells = <2>;
};
gclk: gclk@40001c00 {
compatible = "atmel,samd5x-gclk";
reg = <0x40001c00 0x400>;
#clock-cells = <1>;
};
@ -104,13 +108,15 @@
compatible = "atmel,sam0-nvmctrl";
reg = <0x41004000 0x22>;
interrupts = <29 0>, <30 0>;
lock-regions = <32>;
#address-cells = <1>;
#size-cells = <1>;
lock-regions = <32>;
flash0: flash@0 {
compatible = "soc-nv-flash";
write-block-size = <8>;
};
};
@ -119,6 +125,7 @@
compatible = "atmel,sam0-dmac";
reg = <0x4100A000 0x50>;
interrupts = <31 0>, <32 0>, <33 0>, <34 0>, <35 0>;
#dma-cells = <2>;
};
@ -161,118 +168,128 @@
compatible = "atmel,sam0-sercom";
reg = <0x40003000 0x40>;
interrupts = <46 0>, <47 0>, <48 0>, <49 0>;
status = "disabled";
clocks = <&gclk 7>, <&mclk 0x14 12>;
clock-names = "GCLK", "MCLK";
status = "disabled";
};
sercom1: sercom@40003400 {
compatible = "atmel,sam0-sercom";
reg = <0x40003400 0x40>;
interrupts = <50 0>, <51 0>, <52 0>, <53 0>;
status = "disabled";
clocks = <&gclk 8>, <&mclk 0x14 13>;
clock-names = "GCLK", "MCLK";
status = "disabled";
};
sercom2: sercom@41012000 {
compatible = "atmel,sam0-sercom";
reg = <0x41012000 0x40>;
interrupts = <54 0>, <55 0>, <56 0>, <57 0>;
status = "disabled";
clocks = <&gclk 23>, <&mclk 0x18 9>;
clock-names = "GCLK", "MCLK";
status = "disabled";
};
sercom3: sercom@41014000 {
compatible = "atmel,sam0-sercom";
reg = <0x41014000 0x40>;
interrupts = <58 0>, <59 0>, <60 0>, <61 0>;
status = "disabled";
clocks = <&gclk 24>, <&mclk 0x18 10>;
clock-names = "GCLK", "MCLK";
status = "disabled";
};
sercom4: sercom@43000000 {
compatible = "atmel,sam0-sercom";
reg = <0x43000000 0x40>;
interrupts = <62 0>, <63 0>, <64 0>, <65 0>;
status = "disabled";
clocks = <&gclk 34>, <&mclk 0x20 0>;
clock-names = "GCLK", "MCLK";
status = "disabled";
};
sercom5: sercom@43000400 {
compatible = "atmel,sam0-sercom";
reg = <0x43000400 0x40>;
interrupts = <66 0>, <67 0>, <68 0>, <69 0>;
status = "disabled";
clocks = <&gclk 35>, <&mclk 0x20 1>;
clock-names = "GCLK", "MCLK";
status = "disabled";
};
sercom6: sercom@43000800 {
compatible = "atmel,sam0-sercom";
reg = <0x43000800 0x40>;
interrupts = <70 0>, <71 0>, <72 0>, <73 0>;
status = "disabled";
clocks = <&gclk 36>, <&mclk 0x20 2>;
clock-names = "GCLK", "MCLK";
status = "disabled";
};
sercom7: sercom@43000c00 {
compatible = "atmel,sam0-sercom";
reg = <0x43000C00 0x40>;
interrupts = <74 0>, <75 0>, <76 0>, <77 0>;
status = "disabled";
clocks = <&gclk 37>, <&mclk 0x20 3>;
clock-names = "GCLK", "MCLK";
status = "disabled";
};
pinctrl: pinctrl@41008000 {
compatible = "atmel,sam0-pinctrl";
ranges = <0x41008000 0x41008000 0x200>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x41008000 0x41008000 0x200>;
porta: gpio@41008000 {
compatible = "atmel,sam0-gpio";
reg = <0x41008000 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
portb: gpio@41008080 {
compatible = "atmel,sam0-gpio";
reg = <0x41008080 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
portc: gpio@41008100 {
compatible = "atmel,sam0-gpio";
reg = <0x41008100 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
portd: gpio@41008180 {
compatible = "atmel,sam0-gpio";
reg = <0x41008180 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
};
usb0: usb@41000000 {
compatible = "atmel,sam0-usb";
status = "disabled";
reg = <0x41000000 0x1000>;
interrupts = <80 0>, <81 0>, <82 0>, <83 0>;
status = "disabled";
num-bidir-endpoints = <8>;
};
@ -286,8 +303,9 @@
compatible = "atmel,sam0-rtc";
reg = <0x40002400 0x1C>;
interrupts = <11 0>;
clock-generator = <0>;
status = "disabled";
clock-generator = <0>;
};
adc0: adc@43001c00 {
@ -295,6 +313,10 @@
reg = <0x43001C00 0x4A>;
interrupts = <118 0>, <119 0>;
interrupt-names = "overrun", "resrdy";
clocks = <&gclk 40>, <&mclk 0x20 7>;
clock-names = "GCLK", "MCLK";
#io-channel-cells = <1>;
/*
* 16 MHz max, source clock must not exceed 100 MHz.
@ -304,9 +326,6 @@
*/
gclk = <2>;
prescaler = <4>;
#io-channel-cells = <1>;
clocks = <&gclk 40>, <&mclk 0x20 7>;
clock-names = "GCLK", "MCLK";
calib-offset = <0>;
};
@ -315,6 +334,10 @@
reg = <0x43002000 0x4A>;
interrupts = <120 0>, <121 0>;
interrupt-names = "overrun", "resrdy";
clocks = <&gclk 41>, <&mclk 0x20 8>;
clock-names = "GCLK", "MCLK";
#io-channel-cells = <1>;
/*
* 16 MHz max, source clock must not exceed 100 MHz.
@ -324,9 +347,6 @@
*/
gclk = <2>;
prescaler = <4>;
#io-channel-cells = <1>;
clocks = <&gclk 41>, <&mclk 0x20 8>;
clock-names = "GCLK", "MCLK";
calib-offset = <14>;
};
@ -369,6 +389,7 @@
<90 0>, <91 0>;
clocks = <&gclk 25>, <&mclk 0x18 11>;
clock-names = "GCLK", "MCLK";
channels = <6>;
counter-size = <24>;
};
@ -379,6 +400,7 @@
interrupts = <92 0>, <93 0>, <94 0>, <95 0>, <96 0>;
clocks = <&gclk 25>, <&mclk 0x18 12>;
clock-names = "GCLK", "MCLK";
channels = <4>;
counter-size = <24>;
};
@ -389,6 +411,7 @@
interrupts = <97 0>, <98 0>, <99 0>, <100 0>;
clocks = <&gclk 29>, <&mclk 0x1c 3>;
clock-names = "GCLK", "MCLK";
channels = <3>;
counter-size = <16>;
};
@ -399,6 +422,7 @@
interrupts = <101 0>, <102 0>, <103 0>;
clocks = <&gclk 29>, <&mclk 0x1c 4>;
clock-names = "GCLK", "MCLK";
channels = <2>;
counter-size = <16>;
};
@ -409,6 +433,7 @@
interrupts = <104 0>, <105 0>, <106 0>;
clocks = <&gclk 38>, <&mclk 0x20 4>;
clock-names = "GCLK", "MCLK";
channels = <2>;
counter-size = <16>;
};

View file

@ -14,15 +14,17 @@
reg = <0x42000800 0x400>;
interrupts = <84 0>;
interrupt-names = "gmac";
status = "disabled";
num-queues = <1>;
local-mac-address = [00 00 00 00 00 00];
status = "disabled";
};
mdio: mdio@42000800 {
compatible = "atmel,sam-mdio";
reg = <0x42000800 0x400>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
@ -34,9 +36,10 @@
interrupt-names = "int0", "int1";
clocks = <&gclk 27>, <&mclk 0x10 17>;
clock-names = "GCLK", "MCLK";
status = "disabled";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
divider = <12>;
status = "disabled";
};
can1: can@42000400 {
@ -46,9 +49,10 @@
interrupt-names = "int0", "int1";
clocks = <&gclk 28>, <&mclk 0x10 18>;
clock-names = "GCLK", "MCLK";
status = "disabled";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
divider = <12>;
status = "disabled";
};
};
};

View file

@ -10,9 +10,10 @@
soc {
usb0: usb@41000000 {
compatible = "atmel,sam0-usb";
status = "disabled";
reg = <0x41000000 0x1000>;
interrupts = <6 0>;
status = "disabled";
num-bidir-endpoints = <8>;
};
@ -20,6 +21,7 @@
compatible = "atmel,sam0-dmac";
reg = <0x44000400 0x50>;
interrupts = <5 0>;
#dma-cells = <2>;
};

View file

@ -26,9 +26,10 @@
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m0+";
reg = <0>;
device_type = "cpu";
};
};
@ -50,14 +51,16 @@
compatible = "atmel,sam0-nvmctrl";
reg = <0x41004000 0x22>;
interrupts = <4 0>;
lock-regions = <16>;
#address-cells = <1>;
#size-cells = <1>;
lock-regions = <16>;
flash0: flash@0 {
compatible = "soc-nv-flash";
reg = <0 0x40000>;
write-block-size = <4>;
};
};
@ -66,18 +69,21 @@
compatible = "atmel,saml2x-pm";
reg = <0x40000400 0x400>;
interrupts = <0 0>;
#clock-cells = <2>;
};
mclk: mclk@40000400 {
compatible = "atmel,saml2x-mclk";
reg = <0x40000400 0x400>;
#clock-cells = <2>;
};
gclk: gclk@40001800 {
compatible = "atmel,saml2x-gclk";
reg = <0x40001800 0x400>;
#clock-cells = <1>;
};
@ -85,6 +91,7 @@
compatible = "atmel,sam0-dmac";
reg = <0x44000400 0x400>;
interrupts = <5 0>;
#dma-cells = <2>;
};
@ -143,25 +150,29 @@
pinctrl: pinctrl@40002800 {
compatible = "atmel,sam0-pinctrl";
ranges = <0x40002800 0x40002800 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x40002800 0x40002800 0x100>;
porta: gpio@40002800 {
compatible = "atmel,sam0-gpio";
reg = <0x40002800 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
portb: gpio@40002880 {
compatible = "atmel,sam0-gpio";
reg = <0x40002880 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
};
@ -169,27 +180,30 @@
compatible = "atmel,sam0-rtc";
reg = <0x40002000 0x1c>;
interrupts = <2 0>;
clock-generator = <0>;
status = "disabled";
clock-generator = <0>;
};
adc: adc@43000c00 {
compatible = "atmel,sam0-adc";
reg = <0x43000c00 0x30>;
#io-channel-cells = <1>;
/*
* 16 MHz max, so clock it with the
* 48 MHz DFLL / 2 / 2 = 12 MHz
*/
gclk = <3>;
prescaler = <2>;
#io-channel-cells = <1>;
};
dac: dac@42003000 {
compatible = "atmel,sam0-dac";
status = "disabled";
reg = <0x42003000 0x1a>;
status = "disabled";
#io-channel-cells = <0>;
};

View file

@ -14,9 +14,10 @@
soc {
usb0: usb@41005000 {
compatible = "atmel,sam0-usb";
status = "disabled";
reg = <0x41005000 0x1000>;
interrupts = <7 0>;
status = "disabled";
num-bidir-endpoints = <8>;
};
@ -24,6 +25,7 @@
compatible = "atmel,sam0-dmac";
reg = <0x41004800 0x50>;
interrupts = <6 0>;
#dma-cells = <2>;
};
@ -33,9 +35,11 @@
portc: gpio@41004500 {
compatible = "atmel,sam0-gpio";
reg = <0x41004500 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
};

View file

@ -23,9 +23,10 @@
portc: gpio@40002900 {
compatible = "atmel,sam0-gpio";
reg = <0x40002900 0x80>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
#gpio-cells = <2>;
gpio-controller;
};
};
};
@ -37,19 +38,22 @@
/* SERCOM4 is used to interface with the internal LoRa radio */
compatible = "atmel,sam0-spi";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
dipo = <0>;
dopo = <1>;
cs-gpios = <&portb 31 GPIO_ACTIVE_LOW>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom4_default>;
pinctrl-names = "default";
lora: sx1276@0 {
compatible = "semtech,sx1276";
status = "disabled";
reg = <0>;
status = "disabled";
reset-gpios = <&portb 15 GPIO_ACTIVE_LOW>; /* nRST */
dio-gpios =
<&portb 16 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* DIO0 */