drivers: ethernet: oa_tc6: add c22/c45 registers read/write mdio APIs
Implement c22/c45 registers mdio read/write APIs for the lan865x mdio driver to provide interface to the lan865x internal PHY driver. Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com> Signed-off-by: Lukasz Majewski <lukma@denx.de>
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2 changed files with 140 additions and 0 deletions
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@ -4,6 +4,7 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/net/mdio.h>
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#include "oa_tc6.h"
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#include <zephyr/logging/log.h>
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@ -158,6 +159,69 @@ int oa_tc6_reg_rmw(struct oa_tc6 *tc6, const uint32_t reg, uint32_t mask, uint32
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return oa_tc6_reg_write(tc6, reg, tmp);
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}
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int oa_tc6_mdio_read(struct oa_tc6 *tc6, uint8_t prtad, uint8_t regad, uint16_t *data)
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{
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return oa_tc6_reg_read(
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tc6, OA_TC6_PHY_STD_REG_ADDR_BASE | (regad & OA_TC6_PHY_STD_REG_ADDR_MASK),
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(uint32_t *)data);
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}
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int oa_tc6_mdio_write(struct oa_tc6 *tc6, uint8_t prtad, uint8_t regad, uint16_t data)
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{
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return oa_tc6_reg_write(
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tc6, OA_TC6_PHY_STD_REG_ADDR_BASE | (regad & OA_TC6_PHY_STD_REG_ADDR_MASK), data);
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}
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static int oa_tc6_get_phy_c45_mms(int devad)
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{
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switch (devad) {
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case MDIO_MMD_PCS:
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return OA_TC6_PHY_C45_PCS_MMS2;
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case MDIO_MMD_PMAPMD:
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return OA_TC6_PHY_C45_PMA_PMD_MMS3;
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case MDIO_MMD_VENDOR_SPECIFIC2:
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return OA_TC6_PHY_C45_VS_PLCA_MMS4;
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case MDIO_MMD_AN:
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return OA_TC6_PHY_C45_AUTO_NEG_MMS5;
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default:
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return -EOPNOTSUPP;
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}
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}
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int oa_tc6_mdio_read_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad,
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uint16_t *data)
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{
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uint32_t tmp;
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int ret;
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ret = oa_tc6_get_phy_c45_mms(devad);
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if (ret < 0) {
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return ret;
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}
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ret = oa_tc6_reg_read(tc6, (ret << 16) | regad, &tmp);
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if (ret < 0) {
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return ret;
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}
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*data = (uint16_t)tmp;
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return 0;
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}
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int oa_tc6_mdio_write_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad,
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uint16_t data)
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{
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int ret;
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ret = oa_tc6_get_phy_c45_mms(devad);
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if (ret < 0) {
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return ret;
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}
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return oa_tc6_reg_write(tc6, (ret << 16) | regad, (uint32_t)data);
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}
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int oa_tc6_set_protected_ctrl(struct oa_tc6 *tc6, bool prote)
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{
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int ret;
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@ -80,6 +80,18 @@
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#define OA_TC6_FTR_RCA_MAX GENMASK(4, 0)
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#define OA_TC6_FTR_TXC_MAX GENMASK(4, 0)
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/* PHY Clause 22 registers base address and mask */
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#define OA_TC6_PHY_STD_REG_ADDR_BASE 0xFF00
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#define OA_TC6_PHY_STD_REG_ADDR_MASK 0x1F
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/* PHY – Clause 45 registers memory map selector (MMS) as per table 6 in the
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* OPEN Alliance specification.
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*/
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#define OA_TC6_PHY_C45_PCS_MMS2 2 /* MMD 3 */
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#define OA_TC6_PHY_C45_PMA_PMD_MMS3 3 /* MMD 1 */
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#define OA_TC6_PHY_C45_VS_PLCA_MMS4 4 /* MMD 31 */
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#define OA_TC6_PHY_C45_AUTO_NEG_MMS5 5 /* MMD 7 */
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/**
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* @brief OA TC6 data.
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*/
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@ -243,4 +255,68 @@ int oa_tc6_reg_rmw(struct oa_tc6 *tc6, const uint32_t reg, uint32_t mask, uint32
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* @return 0 if successful, <0 otherwise.
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*/
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int oa_tc6_check_status(struct oa_tc6 *tc6);
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/**
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* @brief Read C22 registers using MDIO Bus
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*
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* This routine provides an interface to perform a C22 register read on the
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* MAC-PHY MDIO bus.
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*
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* @param[in] tc6 Pointer to the tc6 structure for the MAC-PHY
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* @param[in] prtad Port address
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* @param[in] regad Register address
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* @param data Pointer to receive read data
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*
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* @return 0 if successful, <0 otherwise.
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*/
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int oa_tc6_mdio_read(struct oa_tc6 *tc6, uint8_t prtad, uint8_t regad, uint16_t *data);
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/**
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* @brief Write C22 registers using MDIO Bus
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*
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* This routine provides an interface to perform a C22 register write on the
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* MAC-PHY MDIO bus.
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*
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* @param[in] tc6 Pointer to the tc6 structure for the MAC-PHY
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* @param[in] prtad Port address
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* @param[in] regad Register address
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* @param[in] data Write data
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*
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* @return 0 if successful, <0 otherwise.
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*/
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int oa_tc6_mdio_write(struct oa_tc6 *tc6, uint8_t prtad, uint8_t regad, uint16_t data);
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/**
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* @brief Read C45 registers using MDIO Bus
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*
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* This routine provides an interface to perform a C45 register read on the
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* MAC-PHY MDIO bus.
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*
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* @param[in] tc6 Pointer to the tc6 structure for the MAC-PHY
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* @param[in] prtad Port address
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* @param[in] devad MMD device address
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* @param[in] regad Register address
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* @param data Pointer to receive read data
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*
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* @return 0 if successful, <0 otherwise.
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*/
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int oa_tc6_mdio_read_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad,
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uint16_t *data);
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/**
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* @brief Write C45 registers using MDIO Bus
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*
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* This routine provides an interface to perform a C45 register write on the
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* MAC-PHY MDIO bus.
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*
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* @param[in] tc6 Pointer to the tc6 structure for the MAC-PHY
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* @param[in] prtad Port address
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* @param[in] devad MMD device address
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* @param[in] regad Register address
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* @param[in] data Write data
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*
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* @return 0 if successful, <0 otherwise.
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*/
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int oa_tc6_mdio_write_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad,
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uint16_t data);
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#endif /* OA_TC6_CFG_H__ */
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