boards: infineon: add cy8ckit_062s2_ai support

Add board support for cy8ckit_062s2_ai

Signed-off-by: Sandra Schmidt <sandra.schmidt@arrow.com>

boards/infineon/cy8ckit_062s2_ai/Kconfig.cy8ckit_062s2_ai

@@ -0,0 +1,5 @@
+# Copyright (c) 2024 Arrow Electronics.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_CY8CKIT_062S2_AI
+	select SOC_CY8C624ABZI_S2D44

boards/infineon/cy8ckit_062s2_ai/board.cmake

@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: Apache-2.0
+
+# During gdb session, by default connect to CM4 core.
+board_runner_args(openocd "--gdb-init=disconnect")
+board_runner_args(openocd "--gdb-init=target extended-remote :3334")
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+
+board_runner_args(pyocd "--target=cy8c6xxa")
+include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)

boards/infineon/cy8ckit_062s2_ai/board.yml

@@ -0,0 +1,9 @@
+# Copyright (c) 2024 Arrow Electronics.
+# SPDX-License-Identifier: Apache-2.0
+
+board:
+  name: cy8ckit_062s2_ai
+  full_name: PSOC 6 AI Evaluation Kit
+  vendor: infineon
+  socs:
+    - name: cy8c624abzi_s2d44

boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.dts

@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2024 Arrow Electronics.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <infineon/cat1a/mpns/CY8C624ABZI_S2D44.dtsi>
+#include <infineon/cat1a/system_clocks.dtsi>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "CY8CKIT-062S2-AI PSOC 6 AI Evaluation Kit";
+	compatible = "infineon,cy8ckit_062s2_ai", "cypress,PSOC6";
+
+	chosen {
+		zephyr,console = &uart5;
+		zephyr,shell-uart = &uart5;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+
+	aliases {
+		led0 = &user_led0;
+		sw0 = &user_bt;
+		watchdog0 = &watchdog0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		user_led0: led_0 {
+			label = "LED_0";
+			gpios = <&gpio_prt5 3 GPIO_ACTIVE_HIGH>;
+		};
+		user_led1: led_1 {
+			label = "LED_1";
+			gpios = <&gpio_prt5 4 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		user_bt: button_0 {
+			label = "SW_0";
+			gpios = <&gpio_prt5 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			zephyr,code = <INPUT_KEY_0>;
+		};
+	};
+};
+
+&fll0 {
+	status = "okay";
+	clock-frequency = <100000000>;
+};
+
+&clk_hf0 {
+	clock-div = <1>;
+	clocks = <&fll0>;
+};
+
+/* CM4 core clock = 100MHz
+ * &fll clock-frequency / &clk_hf0 clock-div / &clk_fast clock-div = 100MHz / 1 / 1 = 100MHz
+ */
+&clk_fast {
+	clock-div = <1>;
+};
+
+/* CM0+ core clock = 50MHz
+ * &fll clock-frequency / &clk_hf0 clock-div / &clk_slow clock-div = 100MHz / 1 / 2 = 50MHz
+ */
+&clk_slow {
+	clock-div = <2>;
+};
+
+/* PERI core clock = 100MHz
+ * &fll clock-frequency / &clk_hf0 clock-div / &clk_peri clock-div = 100MHz / 1 / 1 = 100MHz
+ */
+&clk_peri {
+	clock-div = <1>;
+};
+
+&gpio_prt5 {
+	status = "okay";
+};
+
+&gpio_prt10 {
+	status = "okay";
+};
+
+/* UART connected to KitProg3 */
+uart5: &scb5 {
+	compatible = "infineon,cat1-uart";
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&p5_1_scb5_uart_tx &p5_0_scb5_uart_rx>;
+	pinctrl-names = "default";
+};
+
+uart1: &scb1 {
+	compatible = "infineon,cat1-uart";
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&p10_0_scb1_uart_rx &p10_1_scb1_uart_tx>;
+	pinctrl-names = "default";
+};
+
+&p5_1_scb5_uart_tx {
+	drive-push-pull;
+};
+
+&p5_0_scb5_uart_rx {
+	input-enable;
+};
+
+&p10_1_scb1_uart_tx {
+	drive-push-pull;
+};
+
+&p10_0_scb1_uart_rx {
+	input-enable;
+};
+
+&watchdog0 {
+	status = "okay";
+};

boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.yaml

@@ -0,0 +1,13 @@
+identifier: cy8ckit_062s2_ai
+name: CY8CKIT-062S2-AI PSOC 6 AI Evaluation Kit
+type: mcu
+arch: arm
+ram: 1024
+flash: 2048
+toolchain:
+  - zephyr
+supported:
+  - gpio
+  - uart
+  - watchdog
+vendor: infineon

boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai_defconfig

@@ -0,0 +1,24 @@
+# Copyright (c) 2024 Arrow Electronics.
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable HW stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable GPIO driver
+CONFIG_GPIO=y
+
+# Enable clock controller
+CONFIG_CLOCK_CONTROL=y
+
+# Add catcm0p sleep images for CM0 Devices
+CONFIG_SOC_PSOC6_CM0P_IMAGE_SLEEP=y

boards/infineon/cy8ckit_062s2_ai/doc/index.rst

@@ -0,0 +1,182 @@
+.. zephyr:board:: cy8ckit_062s2_ai
+
+Overview
+********
+
+The PSOC 6 AI Evaluation Kit (CY8CKIT-062S2-AI) is a cost effective and small development kit that
+enables design and debug of PSOC 6 MCUs.
+It includes a CY8C624ABZI-S2D44 MCU which is based on a 150-MHz Arm |reg| Cortex |reg|-M4 and
+a 100-MHz Arm |reg| Cortex |reg|-M0+, with 2048 KB of on-chip Flash, 1024 KB of SRAM,
+a Quad-SPI external memory interface, built-in hardware and software security features,
+rich analog, digital, and communication peripherals.
+
+The board features an AIROC |reg| CYW43439 Wi-Fi & Bluetooth |reg| combo device,
+a 512 MB NOR flash, an onboard programmer/debugger (KitProg3), USB host and device features,
+two user LEDs, and one push button.
+
+Hardware
+********
+
+For more information about the CY8C624ABZI-S2D44 MCU SoC and CY8CKIT-062S2-AI board:
+
+- `CY8C624ABZI-S2D44 MCU SoC Website`_
+- `CY8C624ABZI-S2D44 MCU Datasheet`_
+- `CY8CKIT-062S2-AI Website`_
+- `CY8CKIT-062S2-AI User Guide`_
+- `CY8CKIT-062S2-AI Schematics`_
+
+Supported Features
+==================
+
+The ``cy8ckit_062s2_ai/cy8c624abzi_s2d44`` board target supports the following hardware features:
+
++-----------+------------+-----------------------+
+| Interface | Controller | Driver/Component      |
++===========+============+=======================+
+| NVIC      | on-chip    | nested vectored       |
+|           |            | interrupt controller  |
++-----------+------------+-----------------------+
+| SYSTICK   | on-chip    | system clock          |
++-----------+------------+-----------------------+
+| GPIO      | on-chip    | GPIO                  |
++-----------+------------+-----------------------+
+| PINCTRL   | on-chip    | pin control           |
++-----------+------------+-----------------------+
+| UART      | on-chip    | serial port-polling;  |
+|           |            | serial port-interrupt |
++-----------+------------+-----------------------+
+| WATCHDOG  | on-chip    | watchdog              |
++-----------+------------+-----------------------+
+
+
+The default configuration can be found in the defconfig and dts files:
+
+  - :zephyr_file:`boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai_defconfig`
+  - :zephyr_file:`boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.dts`
+
+System Clock
+============
+
+The PCY8C624ABZI-S2D44 MCU SoC is configured to use the internal IMO+FLL as a source for
+the system clock. CM0+ works at 50MHz, CM4 - at 100MHz. Other sources for the
+system clock are provided in the SoC, depending on your system requirements.
+
+
+Fetch Binary Blobs
+******************
+
+The CY8CKIT-062S2-AI board requires fetch binary files (e.g CM0+ prebuilt images).
+
+To fetch Binary Blobs:
+
+.. code-block:: console
+
+   west blobs fetch hal_infineon
+
+
+Build blinking led sample
+*************************
+
+Here is an example for building the :zephyr:code-sample:`blinky` sample application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: cy8ckit_062s2_ai/cy8c624abzi_s2d44
+   :goals: build
+
+Programming and Debugging
+*************************
+
+The CY8CKIT-062S2-AI board includes an onboard programmer/debugger (`KitProg3`_)
+to provide debugging, flash programming, and serial communication over USB.
+Flash and debug commands use OpenOCD and require a custom Infineon OpenOCD version,
+that supports KitProg3, to be installed.
+
+
+Infineon OpenOCD Installation
+=============================
+
+Both the full `ModusToolbox`_ and the `ModusToolbox Programming Tools`_ packages include Infineon OpenOCD.
+Installing either of these packages will also install Infineon OpenOCD.
+If neither package is installed, a minimal installation can be done by downloading the `Infineon OpenOCD`_ release
+for your system and manually extract the files to a location of your choice.
+
+.. note::
+
+    Linux requires device access rights to be set up for KitProg3.
+    This is handled automatically by the ModusToolbox and ModusToolbox Programming Tools installations.
+    When doing a minimal installation, this can be done manually by executing the script
+    ``openocd/udev_rules/install_rules.sh``.
+
+West Commands
+=============
+
+The path to the installed Infineon OpenOCD executable must be available to the ``west`` tool commands.
+There are multiple ways of doing this.
+The example below uses a permanent CMake argument to set the CMake variable ``OPENOCD``.
+
+   .. tabs::
+      .. group-tab:: Windows
+
+         .. code-block:: shell
+
+            # Run west config once to set permanent CMake argument
+            west config build.cmake-args -- -DOPENOCD=path/to/infineon/openocd/bin/openocd.exe
+
+            # Do a pristine build once after setting CMake argument
+            west build -b cy8ckit_062s2_ai/cy8c624abzi_s2d44 -p always samples/basic/blinky
+
+            west flash
+            west debug
+
+      .. group-tab:: Linux
+
+         .. code-block:: shell
+
+            # Run west config once to set permanent CMake argument
+            west config build.cmake-args -- -DOPENOCD=path/to/infineon/openocd/bin/openocd
+
+            # Do a pristine build once after setting CMake argument
+            west build -b cy8ckit_062s2_ai/cy8c624abzi_s2d44 -p always samples/basic/blinky
+
+            west flash
+            west debug
+
+Alternatively, pyOCD can also be used to flash the board using
+the ``--runner`` (or ``-r``) option:
+
+.. code-block:: console
+
+   $ west flash --runner pyocd
+
+References
+**********
+
+.. target-notes::
+
+.. _CY8C624ABZI-S2D44 MCU SoC Website:
+    https://www.infineon.com/cms/en/product/microcontroller/32-bit-psoc-arm-cortex-microcontroller/psoc-6-32-bit-arm-cortex-m4-mcu/psoc-62/psoc-62x8-62xa/cy8c624abzi-s2d44/
+
+.. _CY8C624ABZI-S2D44 MCU Datasheet:
+    https://www.infineon.com/dgdl/Infineon-PSOC_6_MCU_CY8C62X8_CY8C62XA-DataSheet-v16_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee7d03a70b1
+
+.. _CY8CKIT-062S2-AI Website:
+    https://www.infineon.com/cms/en/product/evaluation-boards/cy8ckit-062s2-ai/?redirId=273839
+
+.. _CY8CKIT-062S2-AI User Guide:
+    https://www.infineon.com/dgdl/Infineon-CY8CKIT_062S2_AI_KIT_GUIDE-UserManual-v01_00-EN.pdf?fileId=8ac78c8c90530b3a01906d4608842668
+
+.. _CY8CKIT-062S2-AI Schematics:
+    https://www.infineon.com/dgdl/Infineon-CY8CKIT-062S2-AI_PSoC_6_AI_Evaluation_Board_Schematic-PCBDesignData-v01_00-EN.pdf?fileId=8ac78c8c8eeb092c018f0af9e109106f
+
+.. _ModusToolbox:
+    https://softwaretools.infineon.com/tools/com.ifx.tb.tool.modustoolbox
+
+.. _ModusToolbox Programming Tools:
+    https://softwaretools.infineon.com/tools/com.ifx.tb.tool.modustoolboxprogtools
+
+.. _Infineon OpenOCD:
+    https://github.com/Infineon/openocd/releases/latest
+
+.. _KitProg3:
+    https://github.com/Infineon/KitProg3

boards/infineon/cy8ckit_062s2_ai/support/openocd.cfg

@@ -0,0 +1,12 @@
+if {[info exists env(OPENOCD_INTERFACE)]} {
+        set INTERFACE $env(OPENOCD_INTERFACE)
+} else {
+        # By default connect over Debug USB port
+        set INTERFACE "cmsis-dap"
+}
+
+source [find interface/$INTERFACE.cfg]
+
+transport select swd
+
+source [find target/psoc6_2m.cfg]

soc/infineon/cat1a/psoc6_02/Kconfig.defconfig

@@ -13,6 +13,9 @@ config NUM_IRQS
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default 100000000
 
+config BUILD_OUTPUT_HEX
+	default y
+
 # add additional die specific params
 
 endif # SOC_DIE_PSOC6_02