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boards: s32z2xxdc2: add support PWM eMIOS

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Add support PWM eMIOS for s32z2xxdc2 board. There is no LED
on-board dedicated for PWM, so no sample is supported. Only
enabling some pwm tests

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This commit is contained in:
Dat Nguyen Duy 2024-09-14 16:00:15 +07:00 committed by Benjamin Cabé
parent 5014a204cf
commit 82b3e2fc78
9 changed files with 186 additions and 0 deletions
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2
boards/nxp/s32z2xxdc2/doc/index.rst
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@ -60,6 +60,8 @@ The boards support the following hardware features:
+-----------+------------+-------------------------------------+
| DSPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| eMIOS | on-chip | pwm |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.

1
boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.yaml
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@ -19,4 +19,5 @@ supported:
- adc
- i2c
- dma
- pwm
vendor: nxp

1
boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0_D.yaml
View file

@ -19,4 +19,5 @@ supported:
- adc
- i2c
- dma
- pwm
vendor: nxp

1
boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.yaml
View file

@ -19,4 +19,5 @@ supported:
- adc
- i2c
- dma
- pwm
vendor: nxp

1
boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1_D.yaml
View file

@ -19,4 +19,5 @@ supported:
- adc
- i2c
- dma
- pwm
vendor: nxp

39
tests/drivers/pwm/pwm_api/boards/s32z2xxdc2_s32z270_rtu0.overlay Normal file
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@ -0,0 +1,39 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <nxp/s32/S32Z27-BGA594-pinctrl.h>
/ {
aliases {
pwm-0 = &emios0_pwm;
};
};
&pinctrl {
emios0_default: emios0_default {
group0 {
pinmux = <PK0_EMIOS_0_CH24_O>;
output-enable;
};
};
};
&emios0 {
clock-divider = <133>;
status = "okay";
emios0_pwm: pwm {
pinctrl-0 = <&emios0_default>;
pinctrl-names = "default";
status = "okay";
pwm_24 {
channel = <24>;
prescaler = <16>;
pwm-mode = "OPWFMB";
};
};
};

39
tests/drivers/pwm/pwm_api/boards/s32z2xxdc2_s32z270_rtu1.overlay Normal file
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@ -0,0 +1,39 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <nxp/s32/S32Z27-BGA594-pinctrl.h>
/ {
aliases {
pwm-0 = &emios0_pwm;
};
};
&pinctrl {
emios0_default: emios0_default {
group0 {
pinmux = <PK0_EMIOS_0_CH24_O>;
output-enable;
};
};
};
&emios0 {
clock-divider = <133>;
status = "okay";
emios0_pwm: pwm {
pinctrl-0 = <&emios0_default>;
pinctrl-names = "default";
status = "okay";
pwm_24 {
channel = <24>;
prescaler = <16>;
pwm-mode = "OPWFMB";
};
};
};

51
tests/drivers/pwm/pwm_loopback/boards/s32z2xxdc2_s32z270_rtu0.overlay Normal file
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@ -0,0 +1,51 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/pwm/pwm.h>
/ {
pwm_loopback_0 {
compatible = "test-pwm-loopback";
pwms = <&emios0_pwm 24 0 PWM_POLARITY_NORMAL>,
<&emios0_pwm 25 0 PWM_POLARITY_NORMAL>;
};
};
&pinctrl {
emios0_default: emios0_default {
group0 {
pinmux = <PK0_EMIOS_0_CH24_O>;
output-enable;
};
group1 {
pinmux = <PJ15_EMIOS_0_CH25_I>;
input-enable;
};
};
};
&emios0 {
clock-divider = <200>;
status = "okay";
emios0_pwm: pwm {
pinctrl-0 = <&emios0_default>;
pinctrl-names = "default";
status = "okay";
pwm_24 {
channel = <24>;
prescaler = <16>;
pwm-mode = "OPWFMB";
};
pwm_25 {
channel = <25>;
pwm-mode = "SAIC";
prescaler = <16>;
};
};
};

51
tests/drivers/pwm/pwm_loopback/boards/s32z2xxdc2_s32z270_rtu1.overlay Normal file
View file

@ -0,0 +1,51 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/pwm/pwm.h>
/ {
pwm_loopback_0 {
compatible = "test-pwm-loopback";
pwms = <&emios0_pwm 24 0 PWM_POLARITY_NORMAL>,
<&emios0_pwm 25 0 PWM_POLARITY_NORMAL>;
};
};
&pinctrl {
emios0_default: emios0_default {
group0 {
pinmux = <PK0_EMIOS_0_CH24_O>;
output-enable;
};
group1 {
pinmux = <PJ15_EMIOS_0_CH25_I>;
input-enable;
};
};
};
&emios0 {
clock-divider = <200>;
status = "okay";
emios0_pwm: pwm {
pinctrl-0 = <&emios0_default>;
pinctrl-names = "default";
status = "okay";
pwm_24 {
channel = <24>;
prescaler = <16>;
pwm-mode = "OPWFMB";
};
pwm_25 {
channel = <25>;
pwm-mode = "SAIC";
prescaler = <16>;
};
};
};