From 893becf55a149a48a71eae5d8c33961041248e6b Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Tue, 7 Jan 2025 11:20:21 +0800
Subject: [PATCH] dts: arm: nxp_imx95_m7: add lpspi nodes

Added lpspi nodes for nxp_imx95_m7.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
 dts/arm/nxp/nxp_imx95_m7.dtsi | 80 +++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)

diff --git a/dts/arm/nxp/nxp_imx95_m7.dtsi b/dts/arm/nxp/nxp_imx95_m7.dtsi
index 6006c2e905e..18a9f884c7f 100644
--- a/dts/arm/nxp/nxp_imx95_m7.dtsi
+++ b/dts/arm/nxp/nxp_imx95_m7.dtsi
@@ -148,6 +148,26 @@
 			status = "disabled";
 		};
 
+		lpspi3: spi@42550000 {
+			compatible = "nxp,lpspi";
+			reg = <0x42550000 0x4000>;
+			interrupts = <61 3>;
+			clocks = <&scmi_clk IMX95_CLK_LPSPI3>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		lpspi4: spi@42560000 {
+			compatible = "nxp,lpspi";
+			reg = <0x42560000 0x4000>;
+			interrupts = <62 3>;
+			clocks = <&scmi_clk IMX95_CLK_LPSPI4>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		lpuart3: serial@42570000 {
 			compatible = "nxp,imx-lpuart", "nxp,lpuart";
 			reg = <0x42570000 DT_SIZE_K(64)>;
@@ -253,6 +273,46 @@
 			status = "disabled";
 		};
 
+		lpspi5: spi@426f0000 {
+			compatible = "nxp,lpspi";
+			reg = <0x426f0000 0x4000>;
+			interrupts = <177 3>;
+			clocks = <&scmi_clk IMX95_CLK_LPSPI5>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		lpspi6: spi@42700000 {
+			compatible = "nxp,lpspi";
+			reg = <0x42700000 0x4000>;
+			interrupts = <178 3>;
+			clocks = <&scmi_clk IMX95_CLK_LPSPI6>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		lpspi7: spi@42710000 {
+			compatible = "nxp,lpspi";
+			reg = <0x42710000 0x4000>;
+			interrupts = <179 3>;
+			clocks = <&scmi_clk IMX95_CLK_LPSPI7>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		lpspi8: spi@42720000 {
+			compatible = "nxp,lpspi";
+			reg = <0x42720000 0x4000>;
+			interrupts = <180 3>;
+			clocks = <&scmi_clk IMX95_CLK_LPSPI8>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		tpm1: pwm@44310000 {
 			compatible = "nxp,kinetis-tpm";
 			reg = <0x44310000 0x88>;
@@ -295,6 +355,26 @@
 			status = "disabled";
 		};
 
+		lpspi1: spi@44360000 {
+			compatible = "nxp,lpspi";
+			reg = <0x44360000 0x4000>;
+			interrupts = <16 3>;
+			clocks = <&scmi_clk IMX95_CLK_LPSPI1>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		lpspi2: spi@44370000 {
+			compatible = "nxp,lpspi";
+			reg = <0x44370000 0x4000>;
+			interrupts = <17 3>;
+			clocks = <&scmi_clk IMX95_CLK_LPSPI2>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		lpuart1: serial@44380000 {
 			compatible = "nxp,imx-lpuart", "nxp,lpuart";
 			reg = <0x44380000 DT_SIZE_K(64)>;