drivers: bluetooth: hci: Remove ST vendor code from spi.c
Remove ST vendor code from spi.c. Update CMakeLists to select ST vendor file for ST BlueNRG devices. Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
This commit is contained in:
Ali Hozhabri
Carles Cufí
parent
98d6dbf787
commit
8b8be3c7aa
2 changed files with 41 additions and 252 deletions
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@ -19,7 +19,13 @@ zephyr_library_sources_ifdef(CONFIG_BT_ESP32 hci_esp32.c)
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zephyr_library_sources_ifdef(CONFIG_BT_H4 h4.c)
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zephyr_library_sources_ifdef(CONFIG_BT_H5 h5.c)
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zephyr_library_sources_ifdef(CONFIG_BT_HCI_IPC ipc.c)
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zephyr_library_sources_ifdef(CONFIG_BT_SPI spi.c)
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if(CONFIG_BT_SPI)
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if ((CONFIG_DT_HAS_ST_HCI_SPI_V1_ENABLED) OR (CONFIG_DT_HAS_ST_HCI_SPI_V2_ENABLED))
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zephyr_library_sources(hci_spi_st.c)
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else()
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zephyr_library_sources(spi.c)
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endif()
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endif()
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zephyr_library_sources_ifdef(CONFIG_BT_STM32_IPM ipm_stm32wb.c)
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zephyr_library_sources_ifdef(CONFIG_BT_STM32WBA hci_stm32wba.c)
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zephyr_library_sources_ifdef(CONFIG_BT_USERCHAN userchan.c)
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@ -86,16 +86,6 @@ static K_SEM_DEFINE(sem_busy, 1, 1);
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static K_KERNEL_STACK_DEFINE(spi_rx_stack, CONFIG_BT_DRV_RX_STACK_SIZE);
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static struct k_thread spi_rx_thread_data;
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#if defined(CONFIG_BT_BLUENRG_ACI)
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#define BLUENRG_ACI_WRITE_CONFIG_DATA BT_OP(BT_OGF_VS, 0x000C)
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#define BLUENRG_CONFIG_PUBADDR_OFFSET 0x00
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#define BLUENRG_CONFIG_PUBADDR_LEN 0x06
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#define BLUENRG_CONFIG_LL_ONLY_OFFSET 0x2C
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#define BLUENRG_CONFIG_LL_ONLY_LEN 0x01
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static int bt_spi_send_aci_config(uint8_t offset, const uint8_t *value, size_t value_len);
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#endif /* CONFIG_BT_BLUENRG_ACI */
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static const struct spi_dt_spec bus = SPI_DT_SPEC_INST_GET(
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0, SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8), 0);
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@ -146,12 +136,6 @@ static bool bt_spi_handle_vendor_evt(uint8_t *msg)
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switch (bt_spi_get_evt(msg)) {
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case EVT_BLUE_INITIALIZED: {
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k_sem_give(&sem_initialised);
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#if defined(CONFIG_BT_BLUENRG_ACI)
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/* force BlueNRG to be on controller mode */
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uint8_t data = 1;
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bt_spi_send_aci_config(BLUENRG_CONFIG_LL_ONLY_OFFSET, &data, 1);
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#endif
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handled = true;
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}
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default:
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@ -160,144 +144,6 @@ static bool bt_spi_handle_vendor_evt(uint8_t *msg)
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return handled;
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}
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#define IS_IRQ_HIGH gpio_pin_get_dt(&irq_gpio)
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#if DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1)
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/* Define a limit when reading IRQ high */
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/* It can be required to be increased for */
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/* some particular cases. */
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#define IRQ_HIGH_MAX_READ 3
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/* On BlueNRG-MS, host is expected to read */
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/* as long as IRQ pin is high */
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#define READ_CONDITION IS_IRQ_HIGH
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/* We cannot retry write data without reading again the header */
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#define WRITE_DATA_CONDITION(...) true
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static void assert_cs(void)
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{
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gpio_pin_set_dt(&bus.config.cs.gpio, 0);
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gpio_pin_set_dt(&bus.config.cs.gpio, 1);
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}
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static void release_cs(bool data_transaction)
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{
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ARG_UNUSED(data_transaction);
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gpio_pin_set_dt(&bus.config.cs.gpio, 0);
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}
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static int bt_spi_get_header(uint8_t op, uint16_t *size)
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{
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uint8_t header_master[5] = {op, 0, 0, 0, 0};
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uint8_t header_slave[5];
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uint8_t size_offset, attempts;
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int ret;
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if (op == SPI_READ) {
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if (!IS_IRQ_HIGH) {
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*size = 0;
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return 0;
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}
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size_offset = STATUS_HEADER_TOREAD;
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} else if (op == SPI_WRITE) {
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size_offset = STATUS_HEADER_TOWRITE;
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} else {
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return -EINVAL;
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}
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attempts = IRQ_HIGH_MAX_READ;
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do {
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if (op == SPI_READ) {
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/* Keep checking that IRQ is still high, if we need to read */
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if (!IS_IRQ_HIGH) {
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*size = 0;
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return 0;
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}
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}
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assert_cs();
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ret = bt_spi_transceive(header_master, 5, header_slave, 5);
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if (ret) {
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/* SPI transaction failed */
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break;
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}
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*size = (header_slave[STATUS_HEADER_READY] == READY_NOW) ?
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header_slave[size_offset] : 0;
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attempts--;
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} while ((*size == 0) && attempts);
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return ret;
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}
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#elif DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v2)
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#define READ_CONDITION false
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/* We cannot retry writing data without reading the header again */
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#define WRITE_DATA_CONDITION(...) true
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static void assert_cs(uint16_t delay)
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{
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gpio_pin_set_dt(&bus.config.cs.gpio, 0);
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if (delay) {
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k_sleep(K_USEC(delay));
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}
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gpio_pin_set_dt(&bus.config.cs.gpio, 1);
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gpio_pin_interrupt_configure_dt(&irq_gpio, GPIO_INT_DISABLE);
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}
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static void release_cs(bool data_transaction)
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{
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/* Consume possible event signals */
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while (k_sem_take(&sem_request, K_NO_WAIT) == 0) {
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}
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if (data_transaction) {
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/* Wait for IRQ to become low only when data phase has been performed */
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while (IS_IRQ_HIGH) {
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}
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}
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gpio_pin_interrupt_configure_dt(&irq_gpio, GPIO_INT_EDGE_TO_ACTIVE);
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gpio_pin_set_dt(&bus.config.cs.gpio, 0);
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}
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static int bt_spi_get_header(uint8_t op, uint16_t *size)
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{
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uint8_t header_master[5] = {op, 0, 0, 0, 0};
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uint8_t header_slave[5];
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uint16_t cs_delay;
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uint8_t size_offset;
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int ret;
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if (op == SPI_READ) {
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if (!IS_IRQ_HIGH) {
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*size = 0;
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return 0;
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}
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cs_delay = 0;
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size_offset = STATUS_HEADER_TOREAD;
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} else if (op == SPI_WRITE) {
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/* To make sure we have a minimum delay from previous release cs */
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cs_delay = 100;
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size_offset = STATUS_HEADER_TOWRITE;
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} else {
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return -EINVAL;
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}
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assert_cs(cs_delay);
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/* Wait up to a maximum time of 100 ms */
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if (!WAIT_FOR(IS_IRQ_HIGH, 100000, k_usleep(100))) {
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LOG_ERR("IRQ pin did not raise");
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return -EIO;
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}
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ret = bt_spi_transceive(header_master, 5, header_slave, 5);
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*size = header_slave[size_offset] | (header_slave[size_offset + 1] << 8);
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return ret;
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}
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/* Other Boards */
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#else
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#define release_cs(...)
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#define READ_CONDITION false
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#define WRITE_DATA_CONDITION(ret, rx_first) (rx_first != 0U || ret)
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static int bt_spi_get_header(uint8_t op, uint16_t *size)
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{
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uint8_t header_master[5] = {op, 0, 0, 0, 0};
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@ -334,47 +180,6 @@ static int bt_spi_get_header(uint8_t op, uint16_t *size)
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return ret;
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}
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1) */
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#if defined(CONFIG_BT_BLUENRG_ACI)
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static int bt_spi_send_aci_config(uint8_t offset, const uint8_t *value, size_t value_len)
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{
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struct net_buf *buf;
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uint8_t *cmd_data;
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size_t data_len = 2 + value_len;
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buf = bt_hci_cmd_create(BLUENRG_ACI_WRITE_CONFIG_DATA, data_len);
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if (!buf) {
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return -ENOBUFS;
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}
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cmd_data = net_buf_add(buf, data_len);
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cmd_data[0] = offset;
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cmd_data[1] = value_len;
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memcpy(&cmd_data[2], value, value_len);
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return bt_hci_cmd_send(BLUENRG_ACI_WRITE_CONFIG_DATA, buf);
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}
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static int bt_spi_bluenrg_setup(const struct bt_hci_setup_params *params)
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{
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int ret;
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const bt_addr_t *addr = ¶ms->public_addr;
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if (!bt_addr_eq(addr, BT_ADDR_NONE) && !bt_addr_eq(addr, BT_ADDR_ANY)) {
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ret = bt_spi_send_aci_config(
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BLUENRG_CONFIG_PUBADDR_OFFSET,
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addr->val, sizeof(addr->val));
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if (ret != 0) {
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LOG_ERR("Failed to set BlueNRG public address (%d)", ret);
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return ret;
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}
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}
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return 0;
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}
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#endif /* CONFIG_BT_BLUENRG_ACI */
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static struct net_buf *bt_spi_rx_buf_construct(uint8_t *msg)
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{
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@ -453,48 +258,44 @@ static void bt_spi_rx_thread(void *p1, void *p2, void *p3)
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LOG_DBG("");
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do {
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/* Wait for SPI bus to be available */
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k_sem_take(&sem_busy, K_FOREVER);
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ret = bt_spi_get_header(SPI_READ, &size);
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/* Wait for SPI bus to be available */
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k_sem_take(&sem_busy, K_FOREVER);
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ret = bt_spi_get_header(SPI_READ, &size);
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/* Delay here is rounded up to next tick */
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k_sleep(K_USEC(DATA_DELAY_US));
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/* Read data */
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if (ret == 0 && size != 0) {
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do {
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ret = bt_spi_transceive(&txmsg, size,
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&rxmsg, size);
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if (rxmsg[0] == 0U) {
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/* Consider increasing controller-data-delay-us
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* if this message is extremely common.
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*/
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LOG_DBG("Controller not ready for SPI transaction "
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"of %d bytes", size);
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}
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} while (rxmsg[0] == 0U && ret == 0);
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}
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release_cs(size > 0);
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k_sem_give(&sem_busy);
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if (ret || size == 0) {
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if (ret) {
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LOG_ERR("Error %d", ret);
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/* Delay here is rounded up to next tick */
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k_sleep(K_USEC(DATA_DELAY_US));
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/* Read data */
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if (ret == 0 && size != 0) {
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do {
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ret = bt_spi_transceive(&txmsg, size,
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&rxmsg, size);
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if (rxmsg[0] == 0U) {
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/* Consider increasing controller-data-delay-us
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* if this message is extremely common.
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*/
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LOG_DBG("Controller not ready for SPI transaction "
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"of %d bytes", size);
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}
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continue;
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}
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} while (rxmsg[0] == 0U && ret == 0);
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}
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LOG_HEXDUMP_DBG(rxmsg, size, "SPI RX");
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k_sem_give(&sem_busy);
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/* Construct net_buf from SPI data */
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buf = bt_spi_rx_buf_construct(rxmsg);
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if (buf) {
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/* Handle the received HCI data */
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bt_recv(buf);
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if (ret || size == 0) {
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if (ret) {
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LOG_ERR("Error %d", ret);
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}
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} while (READ_CONDITION);
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continue;
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}
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LOG_HEXDUMP_DBG(rxmsg, size, "SPI RX");
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/* Construct net_buf from SPI data */
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buf = bt_spi_rx_buf_construct(rxmsg);
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if (buf) {
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/* Handle the received HCI data */
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bt_recv(buf);
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}
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}
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}
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@ -544,7 +345,7 @@ static int bt_spi_send(struct net_buf *buf)
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while (true) {
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ret = bt_spi_transceive(buf->data, size,
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rx_first, 1);
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if (WRITE_DATA_CONDITION(ret, rx_first[0])) {
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if (rx_first[0] != 0U || ret) {
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break;
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}
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/* Consider increasing controller-data-delay-us
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@ -554,8 +355,6 @@ static int bt_spi_send(struct net_buf *buf)
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}
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}
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release_cs(size > 0);
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k_sem_give(&sem_busy);
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if (ret) {
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@ -565,18 +364,6 @@ static int bt_spi_send(struct net_buf *buf)
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LOG_HEXDUMP_DBG(buf->data, buf->len, "SPI TX");
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#if (DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1) || DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v2))
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/*
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* Since a RESET has been requested, the chip will now restart.
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* Unfortunately the BlueNRG will reply with "reset received" but
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* since it does not send back a NOP, we have no way to tell when the
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* RESET has actually taken place. Instead, we use the vendor command
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* EVT_BLUE_INITIALIZED as an indication that it is safe to proceed.
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*/
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if (bt_spi_get_cmd(buf->data) == BT_HCI_OP_RESET) {
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k_sem_take(&sem_initialised, K_FOREVER);
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}
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v1) || DT_HAS_COMPAT_STATUS_OKAY(st_hci_spi_v2) */
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out:
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net_buf_unref(buf);
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@ -631,10 +418,6 @@ static int bt_spi_open(void)
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static const struct bt_hci_driver drv = {
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.name = DEVICE_DT_NAME(DT_DRV_INST(0)),
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.bus = BT_HCI_DRIVER_BUS_SPI,
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#if defined(CONFIG_BT_BLUENRG_ACI)
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.quirks = BT_QUIRK_NO_RESET,
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.setup = bt_spi_bluenrg_setup,
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#endif /* CONFIG_BT_BLUENRG_ACI */
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.open = bt_spi_open,
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.send = bt_spi_send,
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};
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