drivers: ipm: remove nxp,imx-mu-rev2 compatible
Remove nxp,imx-mu-rev2 compatible. This IP block is the same as the nxp,imx-mu device, and should be handled by the same compatible Instead, use CONFIG_HAS_MCUX to determine which HAL APIs should be used to interact with the messaging unit IP. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
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7 changed files with 15 additions and 34 deletions
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@ -1,9 +1,10 @@
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/*
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* Copyright (c) 2018, NXP
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* Copyright 2018,2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_imx_mu
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#include <errno.h>
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#include <string.h>
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@ -12,11 +13,11 @@
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#include <zephyr/drivers/ipm.h>
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#include <zephyr/irq.h>
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#include <zephyr/sys/barrier.h>
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#if defined(CONFIG_IPM_IMX_REV2)
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#define DT_DRV_COMPAT nxp_imx_mu_rev2
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#ifdef CONFIG_HAS_MCUX
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/* MCUX HAL uses a different header file than the i.MX HAL for this IP block */
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#include "fsl_mu.h"
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#else
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#define DT_DRV_COMPAT nxp_imx_mu
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#include <mu_imx.h>
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#endif
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@ -38,7 +39,7 @@ struct imx_mu_data {
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void *user_data;
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};
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#if defined(CONFIG_IPM_IMX_REV2)
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#if defined(CONFIG_HAS_MCUX)
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/*!
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* @brief Check RX full status.
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*
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@ -127,7 +128,7 @@ static void imx_mu_isr(const struct device *dev)
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}
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if (all_registers_full) {
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for (i = 0; i < IMX_IPM_DATA_REGS; i++) {
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#if defined(CONFIG_IPM_IMX_REV2)
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#if defined(CONFIG_HAS_MCUX)
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data32[i] = MU_ReceiveMsg(base,
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(id * IMX_IPM_DATA_REGS) + i);
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#else
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@ -166,7 +167,7 @@ static int imx_mu_ipm_send(const struct device *dev, int wait, uint32_t id,
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const struct imx_mu_config *config = dev->config;
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MU_Type *base = MU(config);
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uint32_t data32[IMX_IPM_DATA_REGS] = {0};
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#if !IS_ENABLED(CONFIG_IPM_IMX_REV2)
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#if !IS_ENABLED(CONFIG_HAS_MCUX)
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mu_status_t status;
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#endif
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int i;
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@ -182,7 +183,7 @@ static int imx_mu_ipm_send(const struct device *dev, int wait, uint32_t id,
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/* Actual message is passing using 32 bits registers */
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memcpy(data32, data, size);
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#if defined(CONFIG_IPM_IMX_REV2)
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#if defined(CONFIG_HAS_MCUX)
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if (wait) {
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for (i = 0; i < IMX_IPM_DATA_REGS; i++) {
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MU_SendMsgNonBlocking(base, id * IMX_IPM_DATA_REGS + i,
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@ -249,7 +250,7 @@ static int imx_mu_ipm_set_enabled(const struct device *dev, int enable)
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{
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const struct imx_mu_config *config = dev->config;
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MU_Type *base = MU(config);
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#if defined(CONFIG_IPM_IMX_REV2)
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#if defined(CONFIG_HAS_MCUX)
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#if CONFIG_IPM_IMX_MAX_DATA_SIZE_4
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if (enable) {
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MU_EnableInterrupts(base, kMU_Rx0FullInterruptEnable);
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@ -54,7 +54,7 @@
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};
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mailbox_b: mailbox@40c4c000 {
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compatible = "nxp,imx-mu-rev2";
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compatible = "nxp,imx-mu";
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reg = <0x40c4c000 0x4000>;
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interrupts = <118 0>;
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rdc = <0>;
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@ -77,7 +77,7 @@
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};
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mailbox_a: mailbox@40c48000 {
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compatible = "nxp,imx-mu-rev2";
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compatible = "nxp,imx-mu";
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reg = <0x40c48000 0x4000>;
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interrupts = <118 0>;
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rdc = <0>;
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@ -1,20 +0,0 @@
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# Copyright (c) 2018, NXP
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# SPDX-License-Identifier: Apache-2.0
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description: i.MX Messaging Unit
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compatible: "nxp,imx-mu-rev2"
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include: base.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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rdc:
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type: int
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required: true
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description: Set the RDC permission for this peripheral
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@ -69,7 +69,7 @@
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};
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mailbox0: mailbox@30e70000 {
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compatible = "nxp,imx-mu-rev2";
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compatible = "nxp,imx-mu";
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reg = <0x30e70000 0x10000>;
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interrupts = <7 0>;
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rdc = <0>;
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@ -37,13 +37,13 @@
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#include <cmsis_core.h>
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#define DUAL_CORE_MU_ENABLED \
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(CONFIG_SECOND_CORE_MCUX && CONFIG_IPM && CONFIG_IPM_IMX_REV2)
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(CONFIG_SECOND_CORE_MCUX && CONFIG_IPM && CONFIG_IPM_IMX)
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#if DUAL_CORE_MU_ENABLED
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/* Dual core mode is enabled, and messaging unit is present */
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#include <fsl_mu.h>
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#define BOOT_FLAG 0x1U
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#define MU_BASE (MU_Type *)DT_REG_ADDR(DT_INST(0, nxp_imx_mu_rev2))
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#define MU_BASE (MU_Type *)DT_REG_ADDR(DT_INST(0, nxp_imx_mu))
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#endif
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#if CONFIG_USB_DC_NXP_EHCI /* USB PHY configuration */
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