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drivers: counter: Update sam driver to use pinctrl

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This update Atmel sam counter driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit is contained in:
Gerson Fernando Budke 2022-03-12 16:19:59 -03:00 committed by Marti Bolivar
parent a27304b658
commit 986388453f
7 changed files with 12 additions and 33 deletions
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15
drivers/counter/counter_sam_tc.c
View file

@ -30,6 +30,7 @@
#include <init.h>
#include <soc.h>
#include <drivers/counter.h>
#include <drivers/pinctrl.h>
#include <logging/log.h>
LOG_MODULE_REGISTER(counter_sam_tc, CONFIG_COUNTER_LOG_LEVEL);
@ -49,8 +50,7 @@ struct counter_sam_dev_cfg {
uint32_t reg_cmr;
uint32_t reg_rc;
void (*irq_config_func)(const struct device *dev);
const struct soc_gpio_pin *pin_list;
uint8_t pin_list_size;
const struct pinctrl_dev_config *pcfg;
uint8_t clk_sel;
bool nodivclk;
uint8_t tc_chan_num;
@ -312,9 +312,13 @@ static int counter_sam_initialize(const struct device *dev)
const struct counter_sam_dev_cfg *const dev_cfg = dev->config;
Tc *const tc = dev_cfg->regs;
TcChannel *tc_ch = &tc->TcChannel[dev_cfg->tc_chan_num];
int retval;
/* Connect pins to the peripheral */
soc_gpio_list_configure(dev_cfg->pin_list, dev_cfg->pin_list_size);
retval = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT);
if (retval < 0) {
return retval;
}
/* Enable channel's clock */
soc_pmc_peripheral_enable(dev_cfg->periph_id[dev_cfg->tc_chan_num]);
@ -361,7 +365,7 @@ static const struct counter_driver_api counter_sam_driver_api = {
& TC_CMR_TCCLKS_Msk]))
#define COUNTER_SAM_TC_INIT(n) \
static const struct soc_gpio_pin pins_tc##n[] = ATMEL_SAM_DT_INST_PINS(n); \
PINCTRL_DT_INST_DEFINE(n); \
\
static void counter_##n##_sam_config_func(const struct device *dev); \
\
@ -376,8 +380,7 @@ static const struct counter_sam_dev_cfg counter_##n##_sam_config = { \
.reg_cmr = COUNTER_SAM_TC_REG_CMR(n), \
.reg_rc = DT_INST_PROP_OR(n, reg_rc, 0), \
.irq_config_func = &counter_##n##_sam_config_func, \
.pin_list = pins_tc##n, \
.pin_list_size = ARRAY_SIZE(pins_tc##n), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.nodivclk = DT_INST_PROP(n, nodivclk), \
.tc_chan_num = DT_INST_PROP_OR(n, channel, 0), \
.periph_id = DT_INST_PROP(n, peripheral_id), \

3
dts/arm/atmel/sam3x.dtsi
View file

@ -203,7 +203,6 @@
peripheral-id = <27 28 29>;
status = "disabled";
label = "TC0";
pinctrl-0 = <>;
};
tc1: tc@40084000 {
@ -215,7 +214,6 @@
peripheral-id = <30 31 32>;
status = "disabled";
label = "TC1";
pinctrl-0 = <>;
};
tc2: tc@40088000 {
@ -227,7 +225,6 @@
peripheral-id = <33 34 35>;
status = "disabled";
label = "TC2";
pinctrl-0 = <>;
};
};
};

3
dts/arm/atmel/sam4e.dtsi
View file

@ -242,7 +242,6 @@
peripheral-id = <21 22 23>;
status = "disabled";
label = "TC0";
pinctrl-0 = <>;
};
tc1: tc@40094000 {
@ -254,7 +253,6 @@
peripheral-id = <24 25 26>;
status = "disabled";
label = "TC1";
pinctrl-0 = <>;
};
tc2: tc@40098000 {
@ -266,7 +264,6 @@
peripheral-id = <27 28 29>;
status = "disabled";
label = "TC2";
pinctrl-0 = <>;
};
};
};

2
dts/arm/atmel/sam4l.dtsi
View file

@ -220,7 +220,6 @@
peripheral-id = <2>;
status = "disabled";
label = "TC0";
pinctrl-0 = <>;
};
tc1: tc@40014000 {
@ -232,7 +231,6 @@
peripheral-id = <3>;
status = "disabled";
label = "TC1";
pinctrl-0 = <>;
};
trng: random@40068000 {

2
dts/arm/atmel/sam4s.dtsi
View file

@ -193,7 +193,6 @@
peripheral-id = <23 24 25>;
status = "disabled";
label = "TC0";
pinctrl-0 = <>;
};
tc1: tc@40014000 {
@ -205,7 +204,6 @@
peripheral-id = <26 27 28>;
status = "disabled";
label = "TC1";
pinctrl-0 = <>;
};
rstc: rstc@400e1400 {

4
dts/arm/atmel/same70.dtsi
View file

@ -372,7 +372,6 @@
peripheral-id = <23 24 25>;
status = "disabled";
label = "TC0";
pinctrl-0 = <>;
};
tc1: tc@40010000 {
@ -384,7 +383,6 @@
peripheral-id = <26 27 28>;
status = "disabled";
label = "TC1";
pinctrl-0 = <>;
};
tc2: tc@40014000 {
@ -396,7 +394,6 @@
peripheral-id = <47 48 49>;
status = "disabled";
label = "TC2";
pinctrl-0 = <>;
};
tc3: tc@40054000 {
@ -408,7 +405,6 @@
peripheral-id = <50 51 52>;
status = "disabled";
label = "TC3";
pinctrl-0 = <>;
};
trng: random@40070000 {

16
dts/bindings/timer/atmel,sam-tc.yaml
View file

@ -4,7 +4,9 @@ description: Atmel SAM Timer Counter (TC) node
compatible: "atmel,sam-tc"
include: base.yaml
include:
- name: base.yaml
- name: pinctrl-device.yaml
properties:
reg:
@ -65,15 +67,3 @@ properties:
capture or counter mode, or even as event source. The RC register
behavior is SoC dependent. For more information and use cases,
check SoC datasheet and application notes.
pinctrl-0:
type: phandles
required: false
description: |
PIO pin configuration for Timer Counter signals. We expect that
the phandles will reference pinctrl nodes. These nodes will
have a nodelabel that matches the Atmel SoC HAL defines and
be of the form p<port><pin><periph>_<inst>_<signal>.
For example the TC0 on SAME7x would be
pinctrl-0 = <&pa0b_tc0_tioa0 &pa1b_tc0_tiob0>;