drivers: lpadc: Make DT props match RM
- Remove build asserts in favor of DT enums - Remove power level property since it is unused by SDK - Correct voltage ref value in DT to correspond to chip specific values documented in reference manuals instead of corresponding to SDK enum names. - Fix SOC devicetrees affected by these changes. Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
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0090ad718a
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8 changed files with 41 additions and 58 deletions
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@ -46,13 +46,7 @@ struct mcux_lpadc_config {
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uint32_t clock_div;
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uint32_t clock_div;
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uint32_t clock_source;
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uint32_t clock_source;
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lpadc_reference_voltage_source_t voltage_ref;
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lpadc_reference_voltage_source_t voltage_ref;
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#if defined(FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS)\
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&& FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS
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lpadc_conversion_average_mode_t calibration_average;
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#else
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uint32_t calibration_average;
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uint32_t calibration_average;
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#endif /* FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS */
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lpadc_power_level_mode_t power_level;
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uint32_t offset_a;
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uint32_t offset_a;
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uint32_t offset_b;
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uint32_t offset_b;
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void (*irq_config_func)(const struct device *dev);
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void (*irq_config_func)(const struct device *dev);
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@ -459,8 +453,6 @@ static int mcux_lpadc_init(const struct device *dev)
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adc_config.conversionAverageMode = config->calibration_average;
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adc_config.conversionAverageMode = config->calibration_average;
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#endif /* FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS */
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#endif /* FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS */
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adc_config.powerLevelMode = config->power_level;
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LPADC_Init(base, &adc_config);
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LPADC_Init(base, &adc_config);
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/* Do ADC calibration. */
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/* Do ADC calibration. */
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@ -519,13 +511,6 @@ static const struct adc_driver_api mcux_lpadc_driver_api = {
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#define ASSERT_LPADC_CLK_DIV_VALID(val, str) \
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#define ASSERT_LPADC_CLK_DIV_VALID(val, str) \
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BUILD_ASSERT(val == 1 || val == 2 || val == 4 || val == 8, str)
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BUILD_ASSERT(val == 1 || val == 2 || val == 4 || val == 8, str)
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#define ASSERT_LPADC_CALIBRATION_AVERAGE_VALID(val, str) \
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BUILD_ASSERT(val == 1 || val == 2 || val == 4 || val == 8 \
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|| val == 16 || val == 32 || val == 64 || val == 128, str) \
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#define ASSERT_WITHIN_RANGE(val, min, max, str) \
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BUILD_ASSERT(val >= min && val <= max, str)
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#if defined(CONFIG_SOC_SERIES_IMX_RT11XX) || \
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#if defined(CONFIG_SOC_SERIES_IMX_RT11XX) || \
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defined(CONFIG_SOC_SERIES_IMX_RT6XX) || \
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defined(CONFIG_SOC_SERIES_IMX_RT6XX) || \
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defined(CONFIG_SOC_SERIES_IMX_RT5XX) || \
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defined(CONFIG_SOC_SERIES_IMX_RT5XX) || \
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@ -536,20 +521,6 @@ static const struct adc_driver_api mcux_lpadc_driver_api = {
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MUX_A(CM_ADCASYNCCLKSEL, val)
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MUX_A(CM_ADCASYNCCLKSEL, val)
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#endif
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#endif
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#define TO_LPADC_REFERENCE_VOLTAGE(val) \
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_DO_CONCAT(kLPADC_ReferenceVoltageAlt, val)
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#if defined(FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS)\
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&& FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS
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#define TO_LPADC_CALIBRATION_AVERAGE(val) \
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_DO_CONCAT(kLPADC_ConversionAverage, val)
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#else
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#define TO_LPADC_CALIBRATION_AVERAGE(val) 0
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#endif
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#define TO_LPADC_POWER_LEVEL(val) \
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_DO_CONCAT(kLPADC_PowerLevelAlt, val)
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#define LPADC_MCUX_INIT(n) \
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#define LPADC_MCUX_INIT(n) \
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static void mcux_lpadc_config_func_##n(const struct device *dev); \
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static void mcux_lpadc_config_func_##n(const struct device *dev); \
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\
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\
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@ -557,23 +528,13 @@ static const struct adc_driver_api mcux_lpadc_driver_api = {
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"Invalid clock source"); \
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"Invalid clock source"); \
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ASSERT_LPADC_CLK_DIV_VALID(DT_INST_PROP(n, clk_divider), \
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ASSERT_LPADC_CLK_DIV_VALID(DT_INST_PROP(n, clk_divider), \
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"Invalid clock divider"); \
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"Invalid clock divider"); \
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ASSERT_WITHIN_RANGE(DT_INST_PROP(n, voltage_ref), 2, 3, \
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PINCTRL_DT_INST_DEFINE(n); \
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"Invalid voltage reference source"); \
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ASSERT_LPADC_CALIBRATION_AVERAGE_VALID( \
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DT_INST_PROP(n, calibration_average), \
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"Invalid conversion average number for auto-calibration time"); \
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ASSERT_WITHIN_RANGE(DT_INST_PROP(n, power_level), 1, 4, \
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"Invalid power level"); \
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PINCTRL_DT_INST_DEFINE(n); \
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static const struct mcux_lpadc_config mcux_lpadc_config_##n = { \
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static const struct mcux_lpadc_config mcux_lpadc_config_##n = { \
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.base = (ADC_Type *)DT_INST_REG_ADDR(n), \
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.base = (ADC_Type *)DT_INST_REG_ADDR(n), \
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.clock_source = TO_LPADC_CLOCK_SOURCE(DT_INST_PROP(n, clk_source)), \
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.clock_source = TO_LPADC_CLOCK_SOURCE(DT_INST_PROP(n, clk_source)), \
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.clock_div = DT_INST_PROP(n, clk_divider), \
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.clock_div = DT_INST_PROP(n, clk_divider), \
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.voltage_ref = \
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.voltage_ref = DT_INST_PROP(n, voltage_ref), \
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TO_LPADC_REFERENCE_VOLTAGE(DT_INST_PROP(n, voltage_ref)), \
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.calibration_average = DT_INST_ENUM_IDX_OR(n, calibration_average, 0), \
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.calibration_average = \
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TO_LPADC_CALIBRATION_AVERAGE(DT_INST_PROP(n, calibration_average)), \
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.power_level = TO_LPADC_POWER_LEVEL(DT_INST_PROP(n, power_level)), \
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.offset_a = DT_INST_PROP(n, offset_value_a), \
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.offset_a = DT_INST_PROP(n, offset_value_a), \
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.offset_b = DT_INST_PROP(n, offset_value_b), \
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.offset_b = DT_INST_PROP(n, offset_value_b), \
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.irq_config_func = mcux_lpadc_config_func_##n, \
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.irq_config_func = mcux_lpadc_config_func_##n, \
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@ -272,9 +272,9 @@
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status = "disabled";
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status = "disabled";
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clk-divider = <8>;
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clk-divider = <8>;
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clk-source = <0>;
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clk-source = <0>;
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voltage-ref= <2>;
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voltage-ref= <1>;
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calibration-average = <128>;
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calibration-average = <128>;
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power-level = <1>;
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power-level = <0>;
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offset-value-a = <10>;
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offset-value-a = <10>;
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offset-value-b = <10>;
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offset-value-b = <10>;
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#io-channel-cells = <1>;
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#io-channel-cells = <1>;
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@ -246,9 +246,9 @@
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status = "disabled";
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status = "disabled";
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clk-divider = <8>;
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clk-divider = <8>;
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clk-source = <0>;
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clk-source = <0>;
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voltage-ref= <2>;
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voltage-ref= <1>;
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calibration-average = <128>;
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calibration-average = <128>;
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power-level = <1>;
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power-level = <0>;
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offset-value-a = <10>;
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offset-value-a = <10>;
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offset-value-b = <10>;
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offset-value-b = <10>;
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#io-channel-cells = <1>;
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#io-channel-cells = <1>;
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@ -306,9 +306,9 @@
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status = "disabled";
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status = "disabled";
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clk-divider = <8>;
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clk-divider = <8>;
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clk-source = <0>;
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clk-source = <0>;
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voltage-ref= <2>;
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voltage-ref= <1>;
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calibration-average = <128>;
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calibration-average = <128>;
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power-level = <1>;
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power-level = <0>;
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offset-value-a = <10>;
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offset-value-a = <10>;
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offset-value-b = <10>;
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offset-value-b = <10>;
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#io-channel-cells = <1>;
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#io-channel-cells = <1>;
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@ -868,9 +868,9 @@
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status = "disabled";
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status = "disabled";
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clk-divider = <8>;
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clk-divider = <8>;
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clk-source = <0>;
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clk-source = <0>;
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voltage-ref= <2>;
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voltage-ref= <1>;
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calibration-average = <128>;
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calibration-average = <128>;
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power-level = <1>;
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power-level = <0>;
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offset-value-a = <10>;
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offset-value-a = <10>;
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offset-value-b = <10>;
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offset-value-b = <10>;
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#io-channel-cells = <1>;
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#io-channel-cells = <1>;
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@ -883,7 +883,7 @@
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status = "disabled";
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status = "disabled";
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clk-divider = <8>;
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clk-divider = <8>;
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clk-source = <0>;
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clk-source = <0>;
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voltage-ref= <2>;
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voltage-ref= <1>;
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calibration-average = <128>;
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calibration-average = <128>;
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power-level = <1>;
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power-level = <1>;
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offset-value-a = <10>;
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offset-value-a = <10>;
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@ -415,9 +415,9 @@
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status = "disabled";
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status = "disabled";
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clk-divider = <1>;
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clk-divider = <1>;
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clk-source = <0>;
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clk-source = <0>;
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voltage-ref= <2>;
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voltage-ref= <1>;
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calibration-average = <128>;
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calibration-average = <128>;
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power-level = <1>;
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power-level = <0>;
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offset-value-a = <10>;
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offset-value-a = <10>;
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offset-value-b = <10>;
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offset-value-b = <10>;
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#io-channel-cells = <1>;
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#io-channel-cells = <1>;
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@ -347,9 +347,9 @@
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status = "disabled";
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status = "disabled";
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clk-divider = <1>;
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clk-divider = <1>;
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clk-source = <0>;
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clk-source = <0>;
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voltage-ref= <2>;
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voltage-ref= <1>;
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calibration-average = <128>;
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calibration-average = <128>;
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power-level = <1>;
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power-level = <0>;
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offset-value-a = <10>;
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offset-value-a = <10>;
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offset-value-b = <10>;
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offset-value-b = <10>;
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#io-channel-cells = <1>;
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#io-channel-cells = <1>;
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@ -27,17 +27,39 @@ properties:
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voltage-ref:
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voltage-ref:
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type: int
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type: int
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required: true
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required: true
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description: reference voltage source
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description: |
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Voltage reference selection. Corresponds to value of
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register field CFG[REFSEL] (see chip specific manual).
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enum:
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- 0
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- 1
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- 2
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- 3
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calibration-average:
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calibration-average:
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type: int
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type: int
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required: true
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description: conversion average number for auto-calibration
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description: conversion average number for auto-calibration
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enum:
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- 1
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- 2
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- 4
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- 8
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- 16
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- 32
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- 64
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- 128
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power-level:
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power-level:
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type: int
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type: int
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required: true
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required: true
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description: power level for the ADC
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description: |
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Power level selection. Corresponds to the value of
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register field CFG[PWRSEL] (see chip specific manual).
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enum:
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- 0
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- 1
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- 2
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- 3
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offset-value-a:
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offset-value-a:
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type: int
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type: int
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