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drivers: mcux_rgpio: improve pin-gaps handling

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Improve handling of "pin-gaps" using "GPIO_DT_RESERVED_RANGES_NGPIOS"
series macro.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
This commit is contained in:
Chekhov Ma 2024-03-21 18:56:35 +08:00 committed by Maureen Helm
parent 2aa7cb5a7c
commit a296705d37
1 changed files with 19 additions and 23 deletions
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42
drivers/gpio/gpio_mcux_rgpio.c
View file

@ -16,11 +16,6 @@
#include <zephyr/drivers/gpio/gpio_utils.h>
struct gpio_pin_gaps {
uint8_t start;
uint8_t len;
};
/* Required by DEVICE_MMIO_NAMED_* macros */
#define DEV_CFG(_dev) \
((const struct mcux_rgpio_config *)(_dev)->config)
@ -33,9 +28,7 @@ struct mcux_rgpio_config {
DEVICE_MMIO_NAMED_ROM(reg_base);
const struct pinctrl_soc_pinmux *pin_muxes;
const struct gpio_pin_gaps *pin_gaps;
uint8_t mux_count;
uint8_t gap_count;
};
struct mcux_rgpio_data {
@ -57,15 +50,15 @@ static int mcux_rgpio_configure(const struct device *dev,
struct pinctrl_soc_pin pin_cfg;
int cfg_idx = pin, i;
/* Make sure pin is supported */
if ((config->common.port_pin_mask & BIT(pin)) == 0) {
return -ENOTSUP;
}
/* Some SOCs have non-contiguous gpio pin layouts, account for this */
for (i = 0; i < config->gap_count; i++) {
if (pin >= config->pin_gaps[i].start) {
if (pin < (config->pin_gaps[i].start +
config->pin_gaps[i].len)) {
/* Pin is not connected to a mux */
return -ENOTSUP;
}
cfg_idx -= config->pin_gaps[i].len;
for (i = 0; i < pin; i++) {
if ((config->common.port_pin_mask & BIT(i)) == 0) {
cfg_idx--;
}
}
@ -214,9 +207,15 @@ static int mcux_rgpio_pin_interrupt_configure(const struct device *dev,
enum gpio_int_trig trig)
{
RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
const struct mcux_rgpio_config *config = dev->config;
unsigned int key;
uint8_t irqs, irqc;
/* Make sure pin is supported */
if ((config->common.port_pin_mask & BIT(pin)) == 0) {
return -ENOTSUP;
}
irqs = 0; /* only irq0 is used for irq */
if (mode == GPIO_INT_MODE_DISABLED) {
@ -284,14 +283,10 @@ static const struct gpio_driver_api mcux_rgpio_driver_api = {
#define MCUX_RGPIO_PIN_DECLARE(n) \
const struct pinctrl_soc_pinmux mcux_rgpio_pinmux_##n[] = { \
DT_FOREACH_PROP_ELEM(DT_DRV_INST(n), pinmux, PINMUX_INIT) \
}; \
const uint8_t mcux_rgpio_pin_gaps_##n[] = \
DT_INST_PROP_OR(n, gpio_reserved_ranges, {});
};
#define MCUX_RGPIO_PIN_INIT(n) \
.pin_muxes = mcux_rgpio_pinmux_##n, \
.pin_gaps = (const struct gpio_pin_gaps *)mcux_rgpio_pin_gaps_##n, \
.mux_count = DT_PROP_LEN(DT_DRV_INST(n), pinmux), \
.gap_count = (ARRAY_SIZE(mcux_rgpio_pin_gaps_##n) / 2)
.mux_count = DT_PROP_LEN(DT_DRV_INST(n), pinmux),
#define MCUX_RGPIO_IRQ_INIT(n, i) \
do { \
@ -307,9 +302,10 @@ static const struct gpio_driver_api mcux_rgpio_driver_api = {
MCUX_RGPIO_PIN_DECLARE(n) \
static int mcux_rgpio_##n##_init(const struct device *dev); \
\
static const struct mcux_rgpio_config mcux_rgpio_##n##_config = {\
static const struct mcux_rgpio_config mcux_rgpio_##n##_config = { \
.common = { \
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n),\
.port_pin_mask = GPIO_DT_INST_PORT_PIN_MASK_NGPIOS_EXC( \
n, DT_INST_PROP(n, ngpios)) \
}, \
DEVICE_MMIO_NAMED_ROM_INIT(reg_base, DT_DRV_INST(n)), \
MCUX_RGPIO_PIN_INIT(n) \