boards: nordic: Rearrange ram0x regions.
The ram0x partitions seem to be not compliant with nRF54H20 architecture and it causes that in the application dts overlay file it is difficult to extend cpuapp_ram0x_region without modifying whole layout. It is better to place cpurad_ram0x_region at the beginning at 2f010000 address and then cpuapp_ram0x_region right after that. Thanks to that, if the application needs to have more than 256 kB of RAM, in the application dts overlay file, a user can increase cpuapp_ram0x_region size up to 2f0be000. Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
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6dd7e14942
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1 changed files with 20 additions and 20 deletions
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@ -7,14 +7,32 @@
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/ {
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reserved-memory {
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cpuapp_ram0x_region: memory@2f010000 {
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cpurad_ram0x_region: memory@2f010000 {
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compatible = "nordic,owned-memory";
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reg = <0x2f010000 DT_SIZE_K(4)>;
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status = "disabled";
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nordic,access = <NRF_OWNER_ID_RADIOCORE NRF_PERM_RWS>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x2f010000 0x1000>;
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cpusec_cpurad_ipc_shm: memory@0 {
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reg = <0x0 DT_SIZE_K(2)>;
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};
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cpurad_cpusec_ipc_shm: memory@800 {
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reg = <0x800 DT_SIZE_K(2)>;
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};
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};
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cpuapp_ram0x_region: memory@2f011000 {
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compatible = "nordic,owned-memory";
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reg = <0x2f010000 DT_SIZE_K(260)>;
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status = "disabled";
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nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RWS>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x2f010000 0x41000>;
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ranges = <0x0 0x2f011000 0x41000>;
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cpusec_cpuapp_ipc_shm: memory@0 {
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reg = <0x0 DT_SIZE_K(2)>;
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@ -29,24 +47,6 @@
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};
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};
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cpurad_ram0x_region: memory@2f051000 {
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compatible = "nordic,owned-memory";
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reg = <0x2f051000 DT_SIZE_K(4)>;
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status = "disabled";
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nordic,access = <NRF_OWNER_ID_RADIOCORE NRF_PERM_RWS>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x2f051000 0x1000>;
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cpusec_cpurad_ipc_shm: memory@0 {
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reg = <0x0 DT_SIZE_K(2)>;
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};
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cpurad_cpusec_ipc_shm: memory@800 {
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reg = <0x800 DT_SIZE_K(2)>;
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};
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};
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etr_buf_ram0x_region: memory@2f0be000 {
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compatible = "nordic,owned-memory";
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reg = <0x2f0be000 DT_SIZE_K(4)>;
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