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stm32: Fix wrong binding target for RTC_SEL in stm32u0

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Change the stm32u0 clock from CSR_REG to BDCR_REG.

Signed-off-by: James Roy <rruuaanng@outlook.com>
This commit is contained in:
James Roy 2024-11-18 22:20:11 +08:00 committed by Anas Nashif
parent 538753d51b
commit aeaf32aada
1 changed files with 1 additions and 1 deletions
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2
include/zephyr/dt-bindings/clock/stm32u0_clock.h
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@ -87,6 +87,6 @@
#define CLK48_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 26, CCIPR_REG)
#define ADC_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 28, CCIPR_REG)
/** BDCR devices */
#define RTC_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 8, CSR_REG)
#define RTC_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 8, BDCR_REG)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32U0_CLOCK_H_ */