dts: nxp,mcux-edma: Convert compats to prop

Convert the numerous revision compatibles to a DT property for the
revision called nxp,version (inspired from a linux DT property from
st called st,version on their DMA).

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>

drivers/dma/Kconfig.mcux_edma

@@ -3,10 +3,13 @@
 # Copyright (c) 2020, NXP
 # SPDX-License-Identifier: Apache-2.0
 
+EDMA_COMPAT := $(DT_COMPAT_NXP_MCUX_EDMA)
+REV_PROP := nxp,version
+
 config DMA_MCUX_EDMA
 	bool "MCUX DMA driver"
 	default y
-	depends on DT_HAS_NXP_MCUX_EDMA_ENABLED
+	depends on $(dt_compat_any_has_prop,$(EDMA_COMPAT),$(REV_PROP),2)
 	imply NOCACHE_MEMORY if HAS_MCUX_CACHE
 	help
 	  DMA driver for MCUX series SoCs.
@@ -14,14 +17,14 @@ config DMA_MCUX_EDMA
 config DMA_MCUX_EDMA_V3
 	bool "MCUX DMA v3 driver"
 	default y
-	depends on DT_HAS_NXP_MCUX_EDMA_V3_ENABLED
+	depends on $(dt_compat_any_has_prop,$(EDMA_COMPAT),$(REV_PROP),3)
 	help
 	  DMA version 3 driver for MCUX series SoCs.
 
 config DMA_MCUX_EDMA_V4
 	bool "MCUX DMA v4 driver"
 	default y
-	depends on DT_HAS_NXP_MCUX_EDMA_V4_ENABLED
+	depends on $(dt_compat_any_has_prop,$(EDMA_COMPAT),$(REV_PROP),4)
 	help
 	  DMA version 4 driver for MCUX series SoCs.
 

drivers/dma/dma_mcux_edma.c

@@ -8,6 +8,8 @@
  * @brief Common part of DMA drivers for imx rt series.
  */
 
+#define DT_DRV_COMPAT nxp_mcux_edma
+
 #include <errno.h>
 #include <soc.h>
 #include <zephyr/init.h>
@@ -23,14 +25,6 @@
 #include <zephyr/logging/log.h>
 #include <zephyr/irq.h>
 
-#ifdef CONFIG_DMA_MCUX_EDMA
-#define DT_DRV_COMPAT nxp_mcux_edma
-#elif CONFIG_DMA_MCUX_EDMA_V3
-#define DT_DRV_COMPAT nxp_mcux_edma_v3
-#elif CONFIG_DMA_MCUX_EDMA_V4
-#define DT_DRV_COMPAT nxp_mcux_edma_v4
-#endif
-
 LOG_MODULE_REGISTER(dma_mcux_edma, CONFIG_DMA_LOG_LEVEL);
 
 #define HAS_CHANNEL_GAP(n)		DT_INST_NODE_HAS_PROP(n, channel_gap) ||

dts/arm/nxp/nxp_k6x.dtsi

@@ -522,6 +522,7 @@
 		edma0: dma-controller@40008000 {
 			#dma-cells = <2>;
 			compatible = "nxp,mcux-edma";
+			nxp,version = <2>;
 			dma-channels = <16>;
 			dma-requests = <64>;
 			nxp,mem2mem;

dts/arm/nxp/nxp_k8x.dtsi

@@ -427,6 +427,7 @@
 		edma0: dma-controller@40008000 {
 			#dma-cells = <2>;
 			compatible = "nxp,mcux-edma";
+			nxp,version = <2>;
 			dma-channels = <16>;
 			dma-requests = <64>;
 			nxp,mem2mem;

dts/arm/nxp/nxp_ke1xf.dtsi

@@ -99,6 +99,7 @@
 	soc {
 		edma: dma-controller@40008000 {
 			compatible = "nxp,mcux-edma";
+			nxp,version = <2>;
 			dma-channels = <16>;
 			dma-requests = <64>;
 			nxp,mem2mem;

dts/arm/nxp/nxp_ke1xz.dtsi

@@ -443,6 +443,7 @@
 
 		edma: dma-controller@40008000 {
 			compatible = "nxp,mcux-edma";
+			nxp,version = <2>;
 			dma-channels = <8>;
 			dma-requests = <64>;
 			nxp,mem2mem;

dts/arm/nxp/nxp_mcxn23x_common.dtsi

@@ -461,7 +461,8 @@
 
 	edma0: dma-controller@80000 {
 		#dma-cells = <2>;
-		compatible = "nxp,mcux-edma-v4";
+		compatible = "nxp,mcux-edma";
+		nxp,version = <4>;
 		dma-channels = <16>;
 		dma-requests = <120>;
 
@@ -476,7 +477,8 @@
 
 	edma1: dma-controller@a0000 {
 		#dma-cells = <2>;
-		compatible = "nxp,mcux-edma-v4";
+		compatible = "nxp,mcux-edma";
+		nxp,version = <4>;
 		dma-channels = <16>;
 		dma-requests = <120>;
 

dts/arm/nxp/nxp_mcxn94x_common.dtsi

@@ -536,7 +536,8 @@
 
 	edma0: dma-controller@80000 {
 		#dma-cells = <2>;
-		compatible = "nxp,mcux-edma-v4";
+		compatible = "nxp,mcux-edma";
+		nxp,version = <4>;
 		dma-channels = <16>;
 		dma-requests = <120>;
 
@@ -551,7 +552,8 @@
 
 	edma1: dma-controller@a0000 {
 		#dma-cells = <2>;
-		compatible = "nxp,mcux-edma-v4";
+		compatible = "nxp,mcux-edma";
+		nxp,version = <4>;
 		dma-channels = <16>;
 		dma-requests = <120>;
 

dts/arm/nxp/nxp_rt10xx.dtsi

@@ -881,6 +881,7 @@
 		edma0: dma-controller@400e8000 {
 			#dma-cells = <2>;
 			compatible = "nxp,mcux-edma";
+			nxp,version = <2>;
 			dma-channels = <32>;
 			dma-requests = <128>;
 			nxp,mem2mem;

dts/arm/nxp/nxp_rt11xx.dtsi

@@ -1044,6 +1044,7 @@
 		edma0: dma-controller@40070000 {
 			#dma-cells = <2>;
 			compatible = "nxp,mcux-edma";
+			nxp,version = <2>;
 			dma-channels = <32>;
 			dma-requests = <208>;
 			nxp,mem2mem;
@@ -1063,6 +1064,7 @@
 		edma_lpsr0: dma-controller@40c14000 {
 			#dma-cells = <2>;
 			compatible = "nxp,mcux-edma";
+			nxp,version = <2>;
 			dma-channels = <32>;
 			dma-requests = <208>;
 			nxp,mem2mem;

dts/arm/nxp/nxp_s32k344_m7.dtsi

@@ -641,7 +641,8 @@
 		};
 
 		edma0: dma-controller@4020c000 {
-			compatible = "nxp,mcux-edma-v3";
+			compatible = "nxp,mcux-edma";
+			nxp,version = <3>;
 			reg = <0x4020c000 0x3000>, <0x40280000 0x4000>, <0x40284000 0x4000>;
 			dma-channels = <32>;
 			dma-requests = <64>;

dts/bindings/dma/nxp,mcux-edma-v3.yaml

@@ -1,14 +0,0 @@
-# Copyright 2023 NXP
-# SPDX-License-Identifier: Apache-2.0
-
-description: NXP MCUX EDMA version 3 controller
-
-compatible: "nxp,mcux-edma-v3"
-
-include: nxp,mcux-edma.yaml
-
-properties:
-  no-error-irq:
-    type: boolean
-    description: |
-      If the SoCs don't have a separate interrupt id for error IRQ.

dts/bindings/dma/nxp,mcux-edma-v4.yaml

@@ -1,14 +0,0 @@
-# Copyright 2024 NXP
-# SPDX-License-Identifier: Apache-2.0
-
-description: NXP MCUX EDMA version 4 controller
-
-compatible: "nxp,mcux-edma-v4"
-
-include: nxp,mcux-edma.yaml
-
-properties:
-  no-error-irq:
-    type: boolean
-    description: |
-      If the SoCs don't have a separate interrupt id for error IRQ.

dts/bindings/dma/nxp,mcux-edma.yaml

@@ -51,6 +51,20 @@ properties:
       Describes an offset between two channels share the same interrupt entry.
       Default value means each channel has separate interrupt entry.
 
+  no-error-irq:
+    type: boolean
+    description: |
+      If the SoCs don't have a separate interrupt id for error IRQ.
+
+  nxp,version:
+    type: int
+    enum:
+      - 2
+      - 3
+      - 4
+    description: |
+      eDMA IP revision number.
+
   "#dma-cells":
     type: int
     required: true