From b81516f70ed759561d9a05b4aa41e59b15a15054 Mon Sep 17 00:00:00 2001 From: Anisetti Avinash Krishna Date: Thu, 24 Aug 2023 13:40:04 +0530 Subject: [PATCH] dts: x86: intel: alder_lake: Added PWM instance Added PWM instance and enabled it for ADL platform. Signed-off-by: Anisetti Avinash Krishna --- boards/x86/intel_adl/intel_adl_crb.yaml | 1 + dts/x86/intel/alder_lake.dtsi | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/boards/x86/intel_adl/intel_adl_crb.yaml b/boards/x86/intel_adl/intel_adl_crb.yaml index 587985abe48..29b84be545d 100644 --- a/boards/x86/intel_adl/intel_adl_crb.yaml +++ b/boards/x86/intel_adl/intel_adl_crb.yaml @@ -7,6 +7,7 @@ toolchain: ram: 2048 supported: - watchdog + - pwm testing: timeout_multiplier: 4 ignore_tags: diff --git a/dts/x86/intel/alder_lake.dtsi b/dts/x86/intel/alder_lake.dtsi index 81129213282..ee134c3c6b9 100644 --- a/dts/x86/intel/alder_lake.dtsi +++ b/dts/x86/intel/alder_lake.dtsi @@ -119,5 +119,15 @@ reg = <0x0400 0x20>; status = "disabled"; }; + + pwm0: pwm0@fd6d0000 { + compatible = "intel,blinky-pwm"; + reg = <0xfd6d0000 0x400>; + reg-offset = <0x204>; + clock-frequency = <32768>; + max-pins = <1>; + #pwm-cells = <2>; + status = "okay"; + }; }; };