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dts: riscv: introduce Polarfire SOC SPI interface

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Add support for the Microchip Polarfire SOC SPI interface.

Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
This commit is contained in:
Naga Sureshkumar Relli 2023-06-26 14:43:37 +05:30 committed by Chris Friedt
parent 19700040af
commit c5818d4b3f
2 changed files with 26 additions and 0 deletions
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15
dts/bindings/spi/microchip,mpfs-spi.yaml Normal file
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@ -0,0 +1,15 @@
# Copyright (c) 2022 Microchip Inc.
# SPDX-License-Identifier: Apache-2.0
description: Microchip Polarfire SOC SPI IP node
compatible: "microchip,mpfs-spi"
include: spi-controller.yaml
properties:
reg:
required: true
interrupts:
required: true

11
dts/riscv/microchip/mpfs.dtsi
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@ -195,6 +195,17 @@
clock-frequency = <150000000>;
};
spi1: spi@20109000 {
compatible = "microchip,mpfs-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x20109000 0x1000>;
interrupt-parent = <&plic>;
interrupts = <55 1>;
status = "disabled";
clock-frequency = <150000000>;
};
gpio0: gpio@20120000 {
compatible = "microchip,mpfs-gpio";
reg = <0x20120000 0x1000>;