dts/bindings: move RISC-V cores bindings to dts/bindings/cpu/

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This commit moves the bindings of RISC-V cores from `dts/bindings/riscv` to
`dts/bindings/cpu`. This change aligns the bindings of RISC-V cores with
other architectures.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>

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Filip Kokosinski 2024-01-16 13:46:53 +01:00 committed by Carles Cufí

parent 69d7c2a684

commit c592690649

6 changed files with 0 additions and 0 deletions

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dts/bindings/riscv/riscv,cpus.yaml → dts/bindings/cpu/riscv,cpus.yaml

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dts/bindings/riscv/sifive,e24.yaml → dts/bindings/cpu/sifive,e24.yaml

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dts/bindings/riscv/sifive,e31.yaml → dts/bindings/cpu/sifive,e31.yaml

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dts/bindings/riscv/sifive,e51.yaml → dts/bindings/cpu/sifive,e51.yaml

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dts/bindings/riscv/sifive,s7.yaml → dts/bindings/cpu/sifive,s7.yaml

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dts/bindings/riscv/sifive-common.yaml → dts/bindings/cpu/sifive-common.yaml

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