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dts: mcxw71: Move smu2 region inside fast peripheral

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SMU2 was using NS address in dts.
Update to use S address.

Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
This commit is contained in:
Yassine El Aissaoui 2025-01-16 11:24:50 +01:00 committed by Benjamin Cabé
parent 2d465707c9
commit cd361c35be
1 changed files with 15 additions and 16 deletions
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31
dts/arm/nxp/nxp_mcxw71.dtsi
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@ -86,10 +86,6 @@
};
};
smu2: sram@489c0000 {
ranges = <0x0 0x489c0000 DT_SIZE_K(40)>;
};
peripheral: peripheral@50000000 {
ranges = <0x0 0x50000000 0x10000000>;
#address-cells = <1>;
@ -125,18 +121,6 @@
arm,num-irq-priority-bits = <3>;
};
&smu2 {
#address-cells = <1>;
#size-cells = <1>;
rpmsgmem: memory@8800 {
compatible = "zephyr,memory-region","mmio-sram";
reg = <0x8800 DT_SIZE_K(6)>;
zephyr,memory-region = "rpmsg_sh_mem";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
};
};
&pbridge2 {
#address-cells = <1>;
#size-cells = <1>;
@ -387,3 +371,18 @@
interrupts = <63 0>, <64 0>;
};
};
&fast_peripheral1 {
smu2: smu2@1c0000 {
ranges = <0x0 0x1c0000 DT_SIZE_K(40)>;
#address-cells = <1>;
#size-cells = <1>;
rpmsgmem: memory@8800 {
compatible = "zephyr,memory-region","mmio-sram";
reg = <0x8800 DT_SIZE_K(6)>;
zephyr,memory-region = "rpmsg_sh_mem";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
};
};
};