drivers: intc: nxp: convert wkpu to native driver
Convert NXP WKPU to a native driver, all existing functionalities are retained. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
Manuel Argüelles
David Leach
parent
ebd31d3916
commit
d2ba31d503
6 changed files with 204 additions and 162 deletions
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@ -285,28 +285,18 @@ static int nxp_s32_gpio_config_eirq(const struct device *dev,
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#endif /* CONFIG_NXP_S32_EIRQ */
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#if defined(CONFIG_NXP_S32_WKPU)
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static int nxp_s32_gpio_wkpu_get_trigger(Wkpu_Ip_EdgeType *edge_type,
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enum gpio_int_mode mode,
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static int nxp_s32_gpio_wkpu_get_trigger(enum wkpu_nxp_s32_trigger *wkpu_trigger,
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enum gpio_int_trig trigger)
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{
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if (mode == GPIO_INT_MODE_DISABLED) {
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*edge_type = WKPU_IP_NONE_EDGE;
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return 0;
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}
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if (mode == GPIO_INT_MODE_LEVEL) {
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return -ENOTSUP;
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}
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switch (trigger) {
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case GPIO_INT_TRIG_LOW:
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*edge_type = WKPU_IP_FALLING_EDGE;
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*wkpu_trigger = WKPU_NXP_S32_FALLING_EDGE;
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break;
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case GPIO_INT_TRIG_HIGH:
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*edge_type = WKPU_IP_RISING_EDGE;
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*wkpu_trigger = WKPU_NXP_S32_RISING_EDGE;
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break;
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case GPIO_INT_TRIG_BOTH:
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*edge_type = WKPU_IP_BOTH_EDGES;
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*wkpu_trigger = WKPU_NXP_S32_BOTH_EDGES;
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break;
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default:
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return -ENOTSUP;
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@ -323,37 +313,39 @@ static int nxp_s32_gpio_config_wkpu(const struct device *dev,
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const struct gpio_nxp_s32_config *config = dev->config;
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const struct gpio_nxp_s32_irq_config *irq_cfg = config->wkpu_info;
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uint8_t irq_line;
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Wkpu_Ip_EdgeType edge_type;
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enum wkpu_nxp_s32_trigger wkpu_trigger;
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if (irq_cfg == NULL) {
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LOG_ERR("WKPU controller not available or enabled");
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return -ENOTSUP;
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}
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if (nxp_s32_gpio_wkpu_get_trigger(&edge_type, mode, trig)) {
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LOG_ERR("trigger or mode not supported");
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if (mode == GPIO_INT_MODE_LEVEL) {
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return -ENOTSUP;
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}
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irq_line = nxp_s32_gpio_pin_to_line(irq_cfg, pin);
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if (irq_line == NXP_S32_GPIO_LINE_NOT_FOUND) {
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if (edge_type == WKPU_IP_NONE_EDGE) {
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if (mode == GPIO_INT_MODE_DISABLED) {
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return 0;
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}
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LOG_ERR("pin %d cannot be used for external interrupt", pin);
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return -ENOTSUP;
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}
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if (edge_type == WKPU_IP_NONE_EDGE) {
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if (mode == GPIO_INT_MODE_DISABLED) {
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wkpu_nxp_s32_disable_interrupt(irq_cfg->ctrl, irq_line);
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wkpu_nxp_s32_unset_callback(irq_cfg->ctrl, irq_line);
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} else {
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if (wkpu_nxp_s32_set_callback(irq_cfg->ctrl, irq_line,
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nxp_s32_gpio_isr, pin, (void *)dev)) {
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if (nxp_s32_gpio_wkpu_get_trigger(&wkpu_trigger, trig)) {
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return -ENOTSUP;
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}
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if (wkpu_nxp_s32_set_callback(irq_cfg->ctrl, irq_line, pin,
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nxp_s32_gpio_isr, (void *)dev)) {
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LOG_ERR("pin %d is already in use", pin);
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return -EBUSY;
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}
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wkpu_nxp_s32_enable_interrupt(irq_cfg->ctrl, irq_line, edge_type);
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wkpu_nxp_s32_enable_interrupt(irq_cfg->ctrl, irq_line, wkpu_trigger);
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}
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return 0;
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@ -1,6 +1,6 @@
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# Configuration for NXP S32 external interrupt controller
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# Copyright 2022-2023 NXP
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# Copyright 2022-2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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config NXP_S32_EIRQ
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@ -34,6 +34,17 @@ config NXP_S32_WKPU
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bool "Wake-up Unit interrupt controller driver for NXP S32 MCUs"
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default y
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depends on DT_HAS_NXP_S32_WKPU_ENABLED
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select NOCACHE_MEMORY
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help
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Wake-up Unit interrupt controller driver for NXP S32 MCUs
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if NXP_S32_WKPU
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config NXP_S32_WKPU_SOURCES_MAX
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int
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range 32 64
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default 64 if SOC_SERIES_S32K3
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help
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Number of WKPU external and internal sources per controller. This is
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a SoC integration option.
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endif # NXP_S32_WKPU
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@ -10,22 +10,35 @@
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#include <zephyr/device.h>
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#include <zephyr/irq.h>
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#include <zephyr/sys/sys_io.h>
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#include <zephyr/sys/math_extras.h>
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#include <zephyr/drivers/interrupt_controller/intc_wkpu_nxp_s32.h>
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#include <Wkpu_Ip_Irq.h>
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/* NMI Status Flag Register */
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#define WKPU_NSR 0x0
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/* NMI Configuration Register */
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#define WKPU_NCR 0x8
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/* Wakeup/Interrupt Status Flag Register */
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#define WKPU_WISR(n) (0x14 + 0x40 * (n))
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/* Interrupt Request Enable Register */
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#define WKPU_IRER(n) (0x18 + 0x40 * (n))
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/* Wakeup Request Enable Register */
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#define WKPU_WRER(n) (0x1c + 0x40 * (n))
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/* Wakeup/Interrupt Rising-Edge Event Enable Register */
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#define WKPU_WIREER(n) (0x28 + 0x40 * (n))
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/* Wakeup/Interrupt Falling-Edge Event Enable Register */
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#define WKPU_WIFEER(n) (0x2c + 0x40 * (n))
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/* Wakeup/Interrupt Filter Enable Register */
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#define WKPU_WIFER(n) (0x30 + 0x40 * (n))
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#define NXP_S32_NUM_CHANNELS WKPU_IP_NUM_OF_CHANNELS
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#define NXP_S32_NUM_CHANNELS_DEBRACKET __DEBRACKET WKPU_IP_NUM_OF_CHANNELS
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/* Handy accessors */
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#define REG_READ(r) sys_read32(config->base + (r))
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#define REG_WRITE(r, v) sys_write32((v), config->base + (r))
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struct wkpu_nxp_s32_config {
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uint8_t instance;
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const WKPU_Type *base;
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const Wkpu_Ip_IrqConfigType *wkpu_cfg;
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mem_addr_t base;
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uint64_t filter_enable;
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};
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/* Wrapper callback for each WKPU line, from low level driver callback to GPIO callback */
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struct wkpu_nxp_s32_cb {
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wkpu_nxp_s32_callback_t cb;
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uint8_t pin;
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@ -36,60 +49,109 @@ struct wkpu_nxp_s32_data {
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struct wkpu_nxp_s32_cb *cb;
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};
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int wkpu_nxp_s32_set_callback(const struct device *dev, uint8_t line,
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wkpu_nxp_s32_callback_t cb, uint8_t pin, void *arg)
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static void wkpu_nxp_s32_interrupt_handler(const struct device *dev)
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{
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const struct wkpu_nxp_s32_config *config = dev->config;
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struct wkpu_nxp_s32_data *data = dev->data;
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uint64_t pending = wkpu_nxp_s32_get_pending(dev);
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uint64_t irq_mask;
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int irq;
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while (pending) {
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irq_mask = LSB_GET(pending);
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irq = u64_count_trailing_zeros(irq_mask);
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/* Clear status flag */
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REG_WRITE(WKPU_WISR(irq / 32U), REG_READ(WKPU_WISR(irq / 32U)) | irq_mask);
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if (data->cb[irq].cb != NULL) {
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data->cb[irq].cb(data->cb[irq].pin, data->cb[irq].data);
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}
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pending ^= irq_mask;
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}
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}
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int wkpu_nxp_s32_set_callback(const struct device *dev, uint8_t irq, uint8_t pin,
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wkpu_nxp_s32_callback_t cb, void *arg)
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{
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struct wkpu_nxp_s32_data *data = dev->data;
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__ASSERT(line < NXP_S32_NUM_CHANNELS, "Interrupt line is out of range");
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__ASSERT_NO_MSG(irq < CONFIG_NXP_S32_WKPU_SOURCES_MAX);
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if ((data->cb[line].cb == cb) && (data->cb[line].data == arg)) {
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if ((data->cb[irq].cb == cb) && (data->cb[irq].data == arg)) {
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return 0;
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}
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if (data->cb[line].cb) {
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if (data->cb[irq].cb) {
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return -EBUSY;
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}
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data->cb[line].cb = cb;
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data->cb[line].pin = pin;
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data->cb[line].data = arg;
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data->cb[irq].cb = cb;
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data->cb[irq].pin = pin;
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data->cb[irq].data = arg;
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return 0;
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}
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void wkpu_nxp_s32_unset_callback(const struct device *dev, uint8_t line)
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void wkpu_nxp_s32_unset_callback(const struct device *dev, uint8_t irq)
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{
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struct wkpu_nxp_s32_data *data = dev->data;
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__ASSERT(line < NXP_S32_NUM_CHANNELS, "Interrupt line is out of range");
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__ASSERT_NO_MSG(irq < CONFIG_NXP_S32_WKPU_SOURCES_MAX);
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data->cb[line].cb = NULL;
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data->cb[line].pin = 0;
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data->cb[line].data = NULL;
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data->cb[irq].cb = NULL;
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data->cb[irq].pin = 0;
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data->cb[irq].data = NULL;
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}
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void wkpu_nxp_s32_enable_interrupt(const struct device *dev, uint8_t line,
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Wkpu_Ip_EdgeType edge_type)
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void wkpu_nxp_s32_enable_interrupt(const struct device *dev, uint8_t irq,
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enum wkpu_nxp_s32_trigger trigger)
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{
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const struct wkpu_nxp_s32_config *config = dev->config;
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uint32_t mask = BIT(irq % 32U);
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uint8_t reg_idx = irq / 32U;
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uint32_t reg_val;
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__ASSERT(line < NXP_S32_NUM_CHANNELS, "Interrupt line is out of range");
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__ASSERT_NO_MSG(irq < CONFIG_NXP_S32_WKPU_SOURCES_MAX);
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Wkpu_Ip_SetActivationCondition(config->instance, line, edge_type);
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Wkpu_Ip_EnableNotification(line);
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Wkpu_Ip_EnableInterrupt(config->instance, line);
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/* Configure trigger */
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reg_val = REG_READ(WKPU_WIREER(reg_idx));
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if ((trigger == WKPU_NXP_S32_RISING_EDGE) || (trigger == WKPU_NXP_S32_BOTH_EDGES)) {
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reg_val |= mask;
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} else {
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reg_val &= ~mask;
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}
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REG_WRITE(WKPU_WIREER(reg_idx), reg_val);
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reg_val = REG_READ(WKPU_WIFEER(reg_idx));
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if ((trigger == WKPU_NXP_S32_FALLING_EDGE) || (trigger == WKPU_NXP_S32_BOTH_EDGES)) {
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reg_val |= mask;
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} else {
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reg_val &= ~mask;
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}
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REG_WRITE(WKPU_WIFEER(reg_idx), reg_val);
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/* Clear status flag and unmask interrupt */
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REG_WRITE(WKPU_WISR(reg_idx), REG_READ(WKPU_WISR(reg_idx)) | mask);
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REG_WRITE(WKPU_IRER(reg_idx), REG_READ(WKPU_IRER(reg_idx)) | mask);
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}
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void wkpu_nxp_s32_disable_interrupt(const struct device *dev, uint8_t line)
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void wkpu_nxp_s32_disable_interrupt(const struct device *dev, uint8_t irq)
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{
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const struct wkpu_nxp_s32_config *config = dev->config;
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uint32_t mask = BIT(irq % 32U);
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uint8_t reg_idx = irq / 32U;
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__ASSERT(line < NXP_S32_NUM_CHANNELS, "Interrupt line is out of range");
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__ASSERT_NO_MSG(irq < CONFIG_NXP_S32_WKPU_SOURCES_MAX);
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Wkpu_Ip_DisableInterrupt(config->instance, line);
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Wkpu_Ip_DisableNotification(line);
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Wkpu_Ip_SetActivationCondition(config->instance, line, WKPU_IP_NONE_EDGE);
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/* Disable triggers */
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REG_WRITE(WKPU_WIREER(reg_idx), REG_READ(WKPU_WIREER(reg_idx)) & ~mask);
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REG_WRITE(WKPU_WIFEER(reg_idx), REG_READ(WKPU_WIFEER(reg_idx)) & ~mask);
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/* Clear status flag and mask interrupt */
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REG_WRITE(WKPU_WISR(reg_idx), REG_READ(WKPU_WISR(reg_idx)) | mask);
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REG_WRITE(WKPU_IRER(reg_idx), REG_READ(WKPU_IRER(reg_idx)) & ~mask);
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}
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uint64_t wkpu_nxp_s32_get_pending(const struct device *dev)
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@ -97,80 +159,52 @@ uint64_t wkpu_nxp_s32_get_pending(const struct device *dev)
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const struct wkpu_nxp_s32_config *config = dev->config;
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uint64_t flags;
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flags = config->base->WISR & config->base->IRER;
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#if defined(WKPU_IP_64_CH_USED) && (WKPU_IP_64_CH_USED == STD_ON)
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flags |= ((uint64_t)(config->base->WISR_64 & config->base->IRER_64)) << 32U;
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#endif
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flags = REG_READ(WKPU_WISR(0U)) & REG_READ(WKPU_IRER(0U));
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if (CONFIG_NXP_S32_WKPU_SOURCES_MAX > 32U) {
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flags |= ((uint64_t)(REG_READ(WKPU_WISR(1U)) & REG_READ(WKPU_IRER(1U)))) << 32U;
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}
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return flags;
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}
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static void wkpu_nxp_s32_callback(const struct device *dev, uint8 line)
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{
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const struct wkpu_nxp_s32_data *data = dev->data;
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if (data->cb[line].cb != NULL) {
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data->cb[line].cb(data->cb[line].pin, data->cb[line].data);
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}
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}
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static int wkpu_nxp_s32_init(const struct device *dev)
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{
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const struct wkpu_nxp_s32_config *config = dev->config;
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if (Wkpu_Ip_Init(config->instance, config->wkpu_cfg)) {
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return -EINVAL;
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/* Disable triggers, clear status flags and mask all interrupts */
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REG_WRITE(WKPU_WIREER(0U), 0U);
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REG_WRITE(WKPU_WIFEER(0U), 0U);
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REG_WRITE(WKPU_WISR(0U), 0xffffffff);
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REG_WRITE(WKPU_IRER(0U), 0U);
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/* Configure glitch filters */
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REG_WRITE(WKPU_WIFER(0U), (uint32_t)config->filter_enable);
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if (CONFIG_NXP_S32_WKPU_SOURCES_MAX > 32U) {
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REG_WRITE(WKPU_WIREER(1U), 0U);
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REG_WRITE(WKPU_WIFEER(1U), 0U);
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REG_WRITE(WKPU_WISR(1U), 0xffffffff);
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REG_WRITE(WKPU_IRER(1U), 0U);
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REG_WRITE(WKPU_WIFER(1U), (uint32_t)(config->filter_enable >> 32U));
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}
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return 0;
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}
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#define WKPU_NXP_S32_CALLBACK(line, n) \
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void nxp_s32_wkpu_##n##wkpu_line_##line##_callback(void) \
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{ \
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const struct device *dev = DEVICE_DT_INST_GET(n); \
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\
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wkpu_nxp_s32_callback(dev, line); \
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}
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#define WKPU_NXP_S32_CHANNEL_CONFIG(idx, n) \
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{ \
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.hwChannel = idx, \
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.filterEn = DT_INST_PROP_OR(DT_INST_CHILD(n, line_##idx), filter_enable, 0), \
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.edgeEvent = WKPU_IP_NONE_EDGE, \
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.WkpuChannelNotification = nxp_s32_wkpu_##n##wkpu_line_##idx##_callback, \
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.callback = NULL, \
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.callbackParam = 0U \
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}
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#define WKPU_NXP_S32_CHANNELS_CONFIG(n) \
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static const Wkpu_Ip_ChannelConfigType wkpu_##n##_channel_nxp_s32_cfg[] = { \
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LISTIFY(NXP_S32_NUM_CHANNELS_DEBRACKET, WKPU_NXP_S32_CHANNEL_CONFIG, (,), n) \
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}
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#define WKPU_NXP_S32_INSTANCE_CONFIG(n) \
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static const Wkpu_Ip_IrqConfigType wkpu_##n##_nxp_s32_cfg = { \
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.numChannels = NXP_S32_NUM_CHANNELS, \
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.pChannelsConfig = &wkpu_##n##_channel_nxp_s32_cfg, \
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}
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#define WKPU_NXP_S32_CONFIG(n) \
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LISTIFY(NXP_S32_NUM_CHANNELS_DEBRACKET, WKPU_NXP_S32_CALLBACK, (), n) \
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WKPU_NXP_S32_CHANNELS_CONFIG(n); \
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WKPU_NXP_S32_INSTANCE_CONFIG(n);
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#define WKPU_NXP_S32_FILTER_CONFIG(idx, n) \
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COND_CODE_1(DT_PROP(DT_INST_CHILD(n, irq_##idx), filter_enable), (BIT(idx)), (0U))
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#define WKPU_NXP_S32_INIT_DEVICE(n) \
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WKPU_NXP_S32_CONFIG(n) \
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static const struct wkpu_nxp_s32_config wkpu_nxp_s32_conf_##n = { \
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.instance = n, \
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.base = (WKPU_Type *)DT_INST_REG_ADDR(n), \
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.wkpu_cfg = (Wkpu_Ip_IrqConfigType *)&wkpu_##n##_nxp_s32_cfg, \
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.base = DT_INST_REG_ADDR(n), \
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.filter_enable = LISTIFY(CONFIG_NXP_S32_WKPU_SOURCES_MAX, \
|
||||
WKPU_NXP_S32_FILTER_CONFIG, (|), n), \
|
||||
}; \
|
||||
static struct wkpu_nxp_s32_cb wkpu_nxp_s32_cb_##n[NXP_S32_NUM_CHANNELS]; \
|
||||
static struct wkpu_nxp_s32_cb wkpu_nxp_s32_cb_##n[CONFIG_NXP_S32_WKPU_SOURCES_MAX]; \
|
||||
static struct wkpu_nxp_s32_data wkpu_nxp_s32_data_##n = { \
|
||||
.cb = wkpu_nxp_s32_cb_##n, \
|
||||
}; \
|
||||
static int wkpu_nxp_s32_init##n(const struct device *dev) \
|
||||
static int wkpu_nxp_s32_init_##n(const struct device *dev) \
|
||||
{ \
|
||||
int err; \
|
||||
\
|
||||
|
|
@ -180,19 +214,14 @@ static int wkpu_nxp_s32_init(const struct device *dev)
|
|||
} \
|
||||
\
|
||||
IRQ_CONNECT(DT_INST_IRQ(n, irq), DT_INST_IRQ(n, priority), \
|
||||
WKPU_EXT_IRQ_SINGLE_ISR, NULL, \
|
||||
COND_CODE_1(CONFIG_GIC, (DT_INST_IRQ(n, flags)), (0))); \
|
||||
wkpu_nxp_s32_interrupt_handler, DEVICE_DT_INST_GET(n), \
|
||||
COND_CODE_1(CONFIG_GIC, (DT_INST_IRQ(n, flags)), (0U))); \
|
||||
irq_enable(DT_INST_IRQ(n, irq)); \
|
||||
\
|
||||
return 0; \
|
||||
} \
|
||||
DEVICE_DT_INST_DEFINE(n, \
|
||||
wkpu_nxp_s32_init##n, \
|
||||
NULL, \
|
||||
&wkpu_nxp_s32_data_##n, \
|
||||
&wkpu_nxp_s32_conf_##n, \
|
||||
PRE_KERNEL_2, \
|
||||
CONFIG_INTC_INIT_PRIORITY, \
|
||||
DEVICE_DT_INST_DEFINE(n, wkpu_nxp_s32_init_##n, NULL, &wkpu_nxp_s32_data_##n, \
|
||||
&wkpu_nxp_s32_conf_##n, PRE_KERNEL_2, CONFIG_INTC_INIT_PRIORITY, \
|
||||
NULL);
|
||||
|
||||
DT_INST_FOREACH_STATUS_OKAY(WKPU_NXP_S32_INIT_DEVICE)
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
# Copyright 2023 NXP
|
||||
# Copyright 2023-2024 NXP
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
description: NXP S32 Wake-up Unit
|
||||
|
|
@ -13,11 +13,11 @@ properties:
|
|||
|
||||
child-binding:
|
||||
description: |
|
||||
NXP S32 WKPU interrupt line configuration. Specific requirements for each
|
||||
NXP S32 WKPU external interrupt configuration. Specific requirements for each
|
||||
interrupt line can be specified by adding children nodes to this controller,
|
||||
labeled `line_<line_number>`. For example:
|
||||
labeled `irq_<irq_number>`. For example:
|
||||
|
||||
line_0: line_0 {
|
||||
irq_0: irq_0 {
|
||||
filter-enable;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright 2023 NXP
|
||||
* Copyright 2023-2024 NXP
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
|
@ -11,57 +11,67 @@
|
|||
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_WKPU_NXP_S32_H_
|
||||
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_WKPU_NXP_S32_H_
|
||||
|
||||
#include <Wkpu_Ip.h>
|
||||
|
||||
/* Wrapper callback for WKPU line */
|
||||
/** NXP WKPU callback */
|
||||
typedef void (*wkpu_nxp_s32_callback_t)(uint8_t pin, void *arg);
|
||||
|
||||
/**
|
||||
* @brief NXP WKPU pin activation type
|
||||
*/
|
||||
enum wkpu_nxp_s32_trigger {
|
||||
/** Interrupt triggered on rising edge */
|
||||
WKPU_NXP_S32_RISING_EDGE,
|
||||
/** Interrupt triggered on falling edge */
|
||||
WKPU_NXP_S32_FALLING_EDGE,
|
||||
/** Interrupt triggered on either edge */
|
||||
WKPU_NXP_S32_BOTH_EDGES,
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unset WKPU callback for line
|
||||
*
|
||||
* @param dev WKPU device
|
||||
* @param line WKPU line
|
||||
* @param irq WKPU interrupt number
|
||||
*/
|
||||
void wkpu_nxp_s32_unset_callback(const struct device *dev, uint8_t line);
|
||||
void wkpu_nxp_s32_unset_callback(const struct device *dev, uint8_t irq);
|
||||
|
||||
/**
|
||||
* @brief Set WKPU callback for line
|
||||
*
|
||||
* @param dev WKPU device
|
||||
* @param line WKPU line
|
||||
* @param cb Callback
|
||||
* @param irq WKPU interrupt number
|
||||
* @param pin GPIO pin
|
||||
* @param cb Callback
|
||||
* @param arg Callback data
|
||||
*
|
||||
* @retval 0 on SUCCESS
|
||||
* @retval -EBUSY if callback for the line is already set
|
||||
*/
|
||||
int wkpu_nxp_s32_set_callback(const struct device *dev, uint8_t line,
|
||||
wkpu_nxp_s32_callback_t cb, uint8_t pin, void *arg);
|
||||
int wkpu_nxp_s32_set_callback(const struct device *dev, uint8_t irq, uint8_t pin,
|
||||
wkpu_nxp_s32_callback_t cb, void *arg);
|
||||
|
||||
/**
|
||||
* @brief Set edge event and enable interrupt for WKPU line
|
||||
*
|
||||
* @param dev WKPU device
|
||||
* @param line WKPU line
|
||||
* @param edge_type Type of edge event
|
||||
* @param irq WKPU interrupt number
|
||||
* @param trigger pin activation trigger
|
||||
*/
|
||||
void wkpu_nxp_s32_enable_interrupt(const struct device *dev, uint8_t line,
|
||||
Wkpu_Ip_EdgeType edge_type);
|
||||
void wkpu_nxp_s32_enable_interrupt(const struct device *dev, uint8_t irq,
|
||||
enum wkpu_nxp_s32_trigger trigger);
|
||||
|
||||
/**
|
||||
* @brief Disable interrupt for WKPU line
|
||||
*
|
||||
* @param dev WKPU device
|
||||
* @param line WKPU line
|
||||
* @param irq WKPU interrupt number
|
||||
*/
|
||||
void wkpu_nxp_s32_disable_interrupt(const struct device *dev, uint8_t line);
|
||||
void wkpu_nxp_s32_disable_interrupt(const struct device *dev, uint8_t irq);
|
||||
|
||||
/**
|
||||
* @brief Get pending interrupt for WKPU device
|
||||
*
|
||||
* @param dev WKPU device
|
||||
* @return A mask contains pending flags
|
||||
* @return A bitmask containing pending interrupts
|
||||
*/
|
||||
uint64_t wkpu_nxp_s32_get_pending(const struct device *dev);
|
||||
|
||||
|
|
|
|||
2
west.yml
2
west.yml
|
|
@ -198,7 +198,7 @@ manifest:
|
|||
groups:
|
||||
- hal
|
||||
- name: hal_nxp
|
||||
revision: 343395b08fa5151246e147f5e6a523c7d6bdc724
|
||||
revision: 220a4b285d226483a846e41d95abf8ab415b83e3
|
||||
path: modules/hal/nxp
|
||||
groups:
|
||||
- hal
|
||||
|
|
|
|||
Loading…
Reference in a new issue