adafruit-mirror/zephyr
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions 8

drivers: gpio: stm32: move EXTI clock initialization to proper driver

Browse source 
Move the EXTI clock initialization from GPIO to EXTI driver.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
This commit is contained in:
Mathieu Choplain 2024-08-02 14:46:33 +02:00 committed by Anas Nashif
parent d0f528e933
commit d34f5f27bf
2 changed files with 37 additions and 43 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

43
drivers/gpio/gpio_stm32.c
View file

@ -381,47 +381,6 @@ static uint32_t gpio_stm32_get_exti_line_src_port(gpio_pin_t line)
return port;
}
/**
* @brief Enable EXTI of the specific line
*/
static int gpio_stm32_enable_int(uint32_t port, gpio_pin_t pin)
{
#if defined(CONFIG_SOC_SERIES_STM32F2X) || \
defined(CONFIG_SOC_SERIES_STM32F3X) || \
defined(CONFIG_SOC_SERIES_STM32F4X) || \
defined(CONFIG_SOC_SERIES_STM32F7X) || \
defined(CONFIG_SOC_SERIES_STM32H7X) || \
defined(CONFIG_SOC_SERIES_STM32H7RSX) || \
defined(CONFIG_SOC_SERIES_STM32L1X) || \
defined(CONFIG_SOC_SERIES_STM32L4X) || \
defined(CONFIG_SOC_SERIES_STM32G4X)
const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE);
struct stm32_pclken pclken = {
#if defined(CONFIG_SOC_SERIES_STM32H7X)
.bus = STM32_CLOCK_BUS_APB4,
.enr = LL_APB4_GRP1_PERIPH_SYSCFG
#elif defined(CONFIG_SOC_SERIES_STM32H7RSX)
.bus = STM32_CLOCK_BUS_APB4,
.enr = LL_APB4_GRP1_PERIPH_SBS
#else
.bus = STM32_CLOCK_BUS_APB2,
.enr = LL_APB2_GRP1_PERIPH_SYSCFG
#endif /* CONFIG_SOC_SERIES_STM32H7X */
};
int ret;
/* Enable SYSCFG clock */
ret = clock_control_on(clk, (clock_control_subsys_t) &pclken);
if (ret != 0) {
return ret;
}
#endif
gpio_stm32_set_exti_line_src_port(pin, port);
return 0;
}
static int gpio_stm32_port_get_raw(const struct device *dev, uint32_t *value)
{
const struct gpio_stm32_config *cfg = dev->config;
@ -683,7 +642,7 @@ static int gpio_stm32_pin_interrupt_configure(const struct device *dev,
goto exit;
}
gpio_stm32_enable_int(cfg->port, pin);
gpio_stm32_set_exti_line_src_port(pin, cfg->port);
stm32_exti_trigger(pin, edge);

37
drivers/interrupt_controller/intc_exti_stm32.c
View file

@ -14,10 +14,12 @@
#include <zephyr/device.h>
#include <soc.h>
#include <stm32_ll_bus.h>
#include <stm32_ll_exti.h>
#include <zephyr/sys/__assert.h>
#include <zephyr/sys/util.h>
#include <zephyr/drivers/interrupt_controller/exti_stm32.h>
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
#include <zephyr/irq.h>
#include "stm32_hsem.h"
@ -121,6 +123,39 @@ static void stm32_exti_isr(const void *exti_range)
}
}
/** Enables the peripheral clock required to access EXTI registers */
static int stm32_exti_enable_registers(void)
{
/* Initialize to 0 for series where there is nothing to do. */
int ret = 0;
#if defined(CONFIG_SOC_SERIES_STM32F2X) || \
defined(CONFIG_SOC_SERIES_STM32F3X) || \
defined(CONFIG_SOC_SERIES_STM32F4X) || \
defined(CONFIG_SOC_SERIES_STM32F7X) || \
defined(CONFIG_SOC_SERIES_STM32H7X) || \
defined(CONFIG_SOC_SERIES_STM32H7RSX) || \
defined(CONFIG_SOC_SERIES_STM32L1X) || \
defined(CONFIG_SOC_SERIES_STM32L4X) || \
defined(CONFIG_SOC_SERIES_STM32G4X)
const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE);
struct stm32_pclken pclken = {
#if defined(CONFIG_SOC_SERIES_STM32H7X)
.bus = STM32_CLOCK_BUS_APB4,
.enr = LL_APB4_GRP1_PERIPH_SYSCFG
#elif defined(CONFIG_SOC_SERIES_STM32H7RSX)
.bus = STM32_CLOCK_BUS_APB4,
.enr = LL_APB4_GRP1_PERIPH_SBS
#else
.bus = STM32_CLOCK_BUS_APB2,
.enr = LL_APB2_GRP1_PERIPH_SYSCFG
#endif /* CONFIG_SOC_SERIES_STM32H7X */
};
ret = clock_control_on(clk, (clock_control_subsys_t) &pclken);
#endif
return ret;
}
static void stm32_fill_irq_table(int8_t start, int8_t len, int32_t irqn)
{
for (int i = 0; i < len; i++) {
@ -156,7 +191,7 @@ static int stm32_exti_init(const struct device *dev)
interrupt_names,
STM32_EXTI_INIT_LINE_RANGE);
return 0;
return stm32_exti_enable_registers();
}
static struct stm32_exti_data exti_data;