From e22e2263b4f0b0570968b81002afb7a9df6f4d3b Mon Sep 17 00:00:00 2001 From: Wei-Tai Lee Date: Wed, 31 Jan 2024 14:34:26 +0800 Subject: [PATCH] dts: bindings: add andestech,l2c To descibe the AndesTech L2 cache. Besides, remove redundant property in dtsi. Signed-off-by: Wei-Tai Lee --- dts/bindings/cache/andestech,l2c.yaml | 16 ++++++++++++++++ dts/riscv/andes/andes_v5_ae350.dtsi | 1 - 2 files changed, 16 insertions(+), 1 deletion(-) create mode 100644 dts/bindings/cache/andestech,l2c.yaml diff --git a/dts/bindings/cache/andestech,l2c.yaml b/dts/bindings/cache/andestech,l2c.yaml new file mode 100644 index 00000000000..6d9344ad7cd --- /dev/null +++ b/dts/bindings/cache/andestech,l2c.yaml @@ -0,0 +1,16 @@ +# +# Copyright (c) 2024, Andes Technology Corporation. +# +# SPDX-License-Identifier: Apache-2.0 +# + +description: + This is a representation of AndesTech L2 cache node + +compatible: "andestech,l2c" + +include: base.yaml + +properties: + reg: + required: true diff --git a/dts/riscv/andes/andes_v5_ae350.dtsi b/dts/riscv/andes/andes_v5_ae350.dtsi index 419aa712b73..c69a92581ad 100644 --- a/dts/riscv/andes/andes_v5_ae350.dtsi +++ b/dts/riscv/andes/andes_v5_ae350.dtsi @@ -205,7 +205,6 @@ l2_cache: cache-controller@e0500000 { compatible = "andestech,l2c"; reg = <0xe0500000 0x1000>; - cache-unified; status = "disabled"; };