boards: silabs: Add xG29-RB4412A radio board

Add radio board for EFR32MG29 device.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>

boards/silabs/radio_boards/xg29_rb4412a/Kconfig.defconfig

@@ -0,0 +1,31 @@
+# Copyright (c) 2025 Silicon Laboratories Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_XG29_RB4412A
+
+config LOG_BACKEND_SWO_FREQ_HZ
+	default 875000
+	depends on LOG_BACKEND_SWO
+
+if SOC_GECKO_USE_RAIL
+
+config FPU
+	default y
+
+endif # SOC_GECKO_USE_RAIL
+
+if BT
+
+config FPU
+	default y
+
+config COMMON_LIBC_MALLOC_ARENA_SIZE
+	default 8192
+
+config MAIN_STACK_SIZE
+	default 3072 if PM
+	default 2304
+
+endif # BT
+
+endif # BOARD_XG29_RB4412A

boards/silabs/radio_boards/xg29_rb4412a/Kconfig.xg29_rb4412a

@@ -0,0 +1,5 @@
+# Copyright (c) 2025 Silicon Laboratories Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_XG29_RB4412A
+	select SOC_PART_NUMBER_EFR32MG29B140F1024IM40

boards/silabs/radio_boards/xg29_rb4412a/board.cmake

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=EFR32MG29BxxxF1024")
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+
+board_runner_args(silabs_commander "--device=EFR32MG29B140F1024IM40")
+include(${ZEPHYR_BASE}/boards/common/silabs_commander.board.cmake)

boards/silabs/radio_boards/xg29_rb4412a/board.yml

@@ -0,0 +1,6 @@
+board:
+  name: xg29_rb4412a
+  full_name: EFR32xG29 2.4 GHz 8 dBm Buck (xG29-RB4412A)
+  vendor: silabs
+  socs:
+    - name: efr32mg29b140f1024im40

boards/silabs/radio_boards/xg29_rb4412a/doc/index.rst

@@ -0,0 +1,112 @@
+.. zephyr:board:: xg29_rb4412a
+
+Overview
+********
+
+The xG24-RB4412A radio board provides support for the Silicon Labs EFR32MG29 SoC.
+
+Hardware
+********
+
+- EFR32MG29B140F1024IM40 SoC
+- CPU core: ARM Cortex®-M33 with FPU
+- Flash memory: 1024 kB
+- RAM: 256 kB
+- Transmit power: up to +8 dBm
+- Operation frequency: 2.4 GHz
+- Crystal oscillators for LFXO (32.768 kHz) and HFXO (38.4 MHz)
+
+Supported Features
+==================
+
+The ``xg29_rb4412a`` board target supports the following hardware features:
+
++-----------+------------+------------------------+
+| Interface | Controller | Driver/Component       |
++===========+============+========================+
+| CMU       | on-chip    | clock control          |
++-----------+------------+------------------------+
+| MSC       | on-chip    | flash                  |
++-----------+------------+------------------------+
+| GPIO      | on-chip    | gpio, pin control      |
++-----------+------------+------------------------+
+| RTCC      | on-chip    | system clock, counter  |
++-----------+------------+------------------------+
+| MPU       | on-chip    | memory protection unit |
++-----------+------------+------------------------+
+| NVIC      | on-chip    | interrupt controller   |
++-----------+------------+------------------------+
+| USART     | on-chip    | serial, spi            |
++-----------+------------+------------------------+
+| EUSART    | on-chip    | serial, spi            |
++-----------+------------+------------------------+
+| I2C       | on-chip    | i2c                    |
++-----------+------------+------------------------+
+| LDMA      | on-chip    | dma                    |
++-----------+------------+------------------------+
+| WDOG      | on-chip    | watchdog               |
++-----------+------------+------------------------+
+| SE        | on-chip    | entropy                |
++-----------+------------+------------------------+
+| RADIO     | on-chip    | bluetooth              |
++-----------+------------+------------------------+
+
+Programming and Debugging
+*************************
+
+Applications for the ``xg29_rb4412a`` board target can be built, flashed, and debugged in the
+usual way. See :ref:`build_an_application` and :ref:`application_run` for more details on
+building and running.
+
+Flashing
+========
+
+As an example, this section shows how to build and flash the :zephyr:code-sample:`hello_world`
+application.
+
+To build and program the sample to the xG24-RB4412A, complete the following steps:
+
+First, plug the xG24-RB4412A to a compatible mainboard and connect the mainboard to your computer
+using the USB port on the left side.
+Next, build and flash the sample by running the following command:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: xg29_rb4412a
+   :goals: build flash
+
+``west flash`` will by default use SEGGER JLink. Make sure that the JLinkExe binary is available on
+the PATH. Alternatively, use ``west flash -r silabs_commander`` to use Simplicity Commander to flash.
+In this case, make sure that the commander binary is available on PATH.
+
+Open a serial terminal (minicom, putty, etc.) with the following settings:
+
+- Speed: 115200
+- Data: 8 bits
+- Parity: None
+- Stop bits: 1
+
+Reset the board and you should see the following message in the terminal:
+
+.. code-block:: console
+
+   Hello World! xg29_rb4412a
+
+Bluetooth
+=========
+
+To use the BLE function, run the command below to retrieve necessary binary
+blobs from the SiLabs HAL repository.
+
+.. code-block:: console
+
+   west blobs fetch hal_silabs
+
+Then build the Zephyr kernel and a Bluetooth sample with the following
+command. The :zephyr:code-sample:`bluetooth_observer` sample application is used in
+this example.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/bluetooth/observer
+   :board: xg29_rb4412a
+   :goals: build

boards/silabs/radio_boards/xg29_rb4412a/pre_dt_board.cmake

@@ -0,0 +1,5 @@
+# Copyright (c) 2021 Linaro Limited
+# SPDX-License-Identifier: Apache-2.0
+
+# SPI is implemented via usart/eusart so node name isn't spi@...
+list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")

boards/silabs/radio_boards/xg29_rb4412a/xg29_rb4412a-pinctrl.dtsi

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2025 Silicon Laboratories Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/pinctrl/silabs/xg29-pinctrl.h>
+
+&pinctrl {
+	usart1_default: usart1_default {
+		group0 {
+			pins = <USART1_TX_PA5>;
+			drive-push-pull;
+			output-high;
+		};
+		group1 {
+			pins = <USART1_RX_PA6>;
+			input-enable;
+			silabs,input-filter;
+		};
+	};
+
+	eusart1_default: eusart1_default {
+		group0 {
+			pins = <EUSART1_TX_PC0>, <EUSART1_SCLK_PC2>;
+			drive-push-pull;
+			output-high;
+		};
+		group1 {
+			pins = <EUSART1_RX_PC1>;
+			input-enable;
+			silabs,input-filter;
+		};
+	};
+
+	i2c0_default: i2c0_default {
+		group0 {
+			pins = <I2C0_SCL_PB2>, <I2C0_SDA_PB3>;
+			drive-open-drain;
+			bias-pull-up;
+		};
+	};
+};

boards/silabs/radio_boards/xg29_rb4412a/xg29_rb4412a.dts

@@ -0,0 +1,241 @@
+/*
+ * Copyright (c) 2025 Silicon Laboratories Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <silabs/xg29/efr32mg29b140f1024im40.dtsi>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+#include <zephyr/dt-bindings/regulator/silabs_dcdc.h>
+#include "xg29_rb4412a-pinctrl.dtsi"
+
+/ {
+	model = "Silicon Labs xG29-RB4412A";
+	compatible = "silabs,xg29_rb4412a", "silabs,efr32mg29";
+
+	chosen {
+		zephyr,console = &usart1;
+		zephyr,shell-uart = &usart1;
+		zephyr,uart-pipe = &usart1;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,bt-hci = &bt_hci_silabs;
+		zephyr,display = &ls013b7dh03;
+	};
+
+	aliases {
+		led0 = &led0;
+		led1 = &led1;
+		sw0 = &button0;
+		sw1 = &button1;
+		watchdog0 = &wdog0;
+		spi-flash0 = &mx25r80;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0: led_0 {
+			gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
+			label = "LED 0";
+		};
+
+		led1: led_1 {
+			gpios = <&gpiob 1 GPIO_ACTIVE_LOW>;
+			label = "LED 1";
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+
+		button0: button_0 {
+			gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
+			label = "User Push Button 0";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+
+		button1: button_1 {
+			gpios = <&gpiob 1 GPIO_ACTIVE_LOW>;
+			label = "User Push Button 1";
+			zephyr,code = <INPUT_KEY_1>;
+		};
+	};
+
+	display_enable: sensor_enable: gpio_switch_0 {
+		compatible = "regulator-fixed";
+		regulator-name = "sensor_enable";
+		enable-gpios = <&gpioc 7 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&cpu0 {
+	clock-frequency = <76800000>;
+};
+
+&hfxo {
+	status = "okay";
+	ctune = <140>;
+	precision = <50>;
+};
+
+&lfxo {
+	status = "okay";
+	ctune = <63>;
+	precision = <50>;
+};
+
+&hfrcodpll {
+	clock-frequency = <DT_FREQ_K(76800)>;
+	clocks = <&hfxo>;
+	dpll-n = <3839>;
+	dpll-m = <1919>;
+	dpll-edge = "fall";
+	dpll-lock = "phase";
+	dpll-autorecover;
+};
+
+&em23grpaclk {
+	clocks = <&lfxo>;
+};
+
+&em4grpaclk {
+	clocks = <&lfxo>;
+};
+
+&rtccclk {
+	clocks = <&lfxo>;
+};
+
+&wdog0clk {
+	clocks = <&lfxo>;
+};
+
+&usart1 {
+	current-speed = <115200>;
+	pinctrl-0 = <&usart1_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&i2c0 {
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	si7021: si7021@40 {
+		compatible = "silabs,si7006";
+		reg = <0x40>;
+		status = "okay";
+	};
+};
+
+&eusart1 {
+	pinctrl-0 = <&eusart1_default>;
+	pinctrl-names = "default";
+	clock-frequency = <DT_FREQ_M(8)>;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cs-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>, <&gpioc 6 GPIO_ACTIVE_HIGH>;
+
+	mx25r80: mx25r8035f@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <DT_FREQ_M(33)>;
+		size = <0x800000>;
+		jedec-id = [c2 28 14];
+		has-dpd;
+		dpd-wakeup-sequence = <30000 20 35000>;
+		t-enter-dpd = <0>;
+		mxicy,mx25r-power-mode = "low-power";
+	};
+
+	ls013b7dh03: ls0xx@1 {
+		compatible = "sharp,ls0xx";
+		spi-max-frequency = <DT_FREQ_M(2)>;
+		reg = <1>;
+		width = <128>;
+		height = <128>;
+		extcomin-gpios = <&gpiod 2 GPIO_ACTIVE_HIGH>;
+		extcomin-frequency = <60>;
+	};
+};
+
+&gpio {
+	status = "okay";
+};
+
+&gpioa {
+	status = "okay";
+};
+
+&gpiob {
+	status = "okay";
+
+	vcom-enable {
+		gpio-hog;
+		gpios = <4 GPIO_ACTIVE_HIGH>;
+		output-high;
+	};
+};
+
+&gpioc {
+	status = "okay";
+};
+
+&gpiod {
+	status = "okay";
+};
+
+&wdog0 {
+	status = "okay";
+};
+
+&rtcc0 {
+	status = "okay";
+};
+
+&se {
+	status = "okay";
+};
+
+&dcdc {
+	status = "okay";
+	regulator-boot-on;
+	regulator-initial-mode = <SILABS_DCDC_MODE_BUCK>;
+};
+
+&bt_hci_silabs {
+	status = "okay";
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x00000000 DT_SIZE_K(48)>;
+		};
+
+		slot0_partition: partition@c000 {
+			label = "image-0";
+			reg = <0x0000C000 DT_SIZE_K(472)>;
+		};
+
+		slot1_partition: partition@82000 {
+			label = "image-1";
+			reg = <0x00082000 DT_SIZE_K(472)>;
+		};
+
+		storage_partition: partition@F8000 {
+			label = "storage";
+			reg = <0x000F8000 DT_SIZE_K(32)>;
+		};
+	};
+};

boards/silabs/radio_boards/xg29_rb4412a/xg29_rb4412a.yaml

@@ -0,0 +1,20 @@
+identifier: xg29_rb4412a
+name: EFR32xG29 2.4 GHz 8 dBm Buck Radio Board (xG29-RB4412A, BRD4412A)
+type: mcu
+arch: arm
+ram: 256
+flash: 1024
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+supported:
+  - bluetooth
+  - gpio
+  - uart
+  - dma
+  - watchdog
+testing:
+  ignore_tags:
+    - pm
+vendor: silabs

boards/silabs/radio_boards/xg29_rb4412a/xg29_rb4412a_defconfig

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_ARM_MPU=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_GPIO=y

samples/bluetooth/central/sample.yaml

@@ -19,4 +19,5 @@ tests:
       - sltb010a/efr32bg22c224f512im40
       - xg24_rb4187c/efr32mg24b220f1536im48
       - xg27_dk2602a/efr32bg27c140f768im40
+      - xg29_rb4412a/efr32mg29b140f1024im40
     build_only: true

samples/bluetooth/peripheral/sample.yaml

@@ -29,4 +29,5 @@ tests:
       - sltb010a/efr32bg22c224f512im40
       - xg24_rb4187c/efr32mg24b220f1536im48
       - xg27_dk2602a/efr32bg27c140f768im40
+      - xg29_rb4412a/efr32mg29b140f1024im40
     build_only: true

tests/drivers/clock_control/clock_control_api/testcase.yaml

@@ -13,6 +13,7 @@ tests:
       - sltb010a@0
       - xg24_dk2601b
       - xg27_dk2602a
+      - xg29_rb4412a
     integration_platforms:
       - esp32_devkitc_wroom/esp32/procpu
   drivers.clock.clock_control_nrf5: