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mm: tlb: Improve the context saving function

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Attempt to invalidate cache for an unmapped address results in cpu
exception for the ptl platform. Perform cache invalidation after
translation activation in tlb. Add address mapping in mmu for platforms
that have it.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
This commit is contained in:
Adrian Warecki 2024-10-30 15:18:11 +01:00 committed by Carles Cufí
parent 750212c2a9
commit e4a9503706
1 changed files with 13 additions and 6 deletions
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19
drivers/mm/mm_drv_intel_adsp_mtl_tlb.c
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@ -836,18 +836,25 @@ static void adsp_mm_save_context(void *storage_buffer)
if (((tlb_entries[entry_idx] & TLB_PADDR_MASK) != entry) ||
((tlb_entries[entry_idx] & TLB_ENABLE_BIT) != TLB_ENABLE_BIT)) {
/* this page needs remapping, invalidate cache to avoid stalled data
* all cache data has been flushed before
* do this for pages to remap only
*/
sys_cache_data_invd_range(UINT_TO_POINTER(phys_addr),
CONFIG_MM_DRV_PAGE_SIZE);
/* This page needs remapping */
/* Enable the translation in the TLB entry */
entry |= TLB_ENABLE_BIT;
/* map the page 1:1 virtual to physical */
tlb_entries[entry_idx] = entry;
#ifdef CONFIG_MMU
arch_mem_map(UINT_TO_POINTER(phys_addr), phys_addr, CONFIG_MM_DRV_PAGE_SIZE,
K_MEM_CACHE_WB);
#endif
/* Invalidate cache to avoid stalled data
* all cache data has been flushed before
* do this for pages to remap only
*/
sys_cache_data_invd_range(UINT_TO_POINTER(phys_addr),
CONFIG_MM_DRV_PAGE_SIZE);
}
/* save physical address */