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dts: riscv: introduce PolarFire SoC I2C interface

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Add support for Microchip's PolarFire SoC I2C interface
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
This commit is contained in:
Conor Paxton 2023-06-09 21:59:05 +01:00 committed by Anas Nashif
parent 10be3a1263
commit ea42995f2e
2 changed files with 47 additions and 0 deletions
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25
dts/bindings/i2c/microchip,mpfs-i2c.yaml Normal file
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@ -0,0 +1,25 @@
#
# Copyright (c) 2023 Microchip Technology Inc.
#
# SPDX-License-Identifier: Apache-2.0
#
description:
Microchip MPFS I2C Controller Device Tree Bindings
compatible: "microchip,mpfs-i2c"
include: i2c-controller.yaml
properties:
reg:
required: true
interrupts:
required: true
clock-frequency:
description: |
Desired I2C bus clock frequency in Hz. As only Standard and Fast
modes are supported, possible values are 100000 and 400000.
enum: [100000, 400000]

22
dts/riscv/microchip/mpfs-icicle.dtsi
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@ -233,5 +233,27 @@
ngpios = <32>;
status = "disabled";
};
i2c0: i2c@2010a000 {
compatible = "microchip,mpfs-i2c";
reg = <0x2010a000 0x1000>;
interrupt-parent = <&plic>;
interrupts = <58 1>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <100000>;
status = "disabled";
};
i2c1: i2c@2010b000 {
compatible = "microchip,mpfs-i2c";
reg = <0x2010b000 0x1000>;
interrupt-parent = <&plic>;
interrupts = <61 1>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <100000>;
status = "disabled";
};
};
};