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soc: stm32g4x/stm32l0x: fix soc hook calls

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Missed 2 places related to power management.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2024-09-20 17:05:43 -04:00 committed by Henrik Brix Andersen
parent 3eded9d10d
commit f08c91a7e4
3 changed files with 6 additions and 8 deletions
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2
soc/st/stm32/stm32g4x/soc.c
View file

@ -20,6 +20,8 @@
#include <stm32_ll_pwr.h> #include <stm32_ll_pwr.h>
#endif /* PWR_CR3_UCPD_DBDIS */ #endif /* PWR_CR3_UCPD_DBDIS */
extern void stm32_power_init(void);
/** /**
* @brief Perform basic hardware initialization at boot. * @brief Perform basic hardware initialization at boot.
* *

8
soc/st/stm32/stm32l0x/power.c
View file

@ -72,11 +72,3 @@ void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
*/ */
irq_unlock(0); irq_unlock(0);
} }
/* Initialize STM32 Power */
void soc_early_init_hook(void)
{
/* Enable Power clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
}

4
soc/st/stm32/stm32l0x/soc.c
View file

@ -40,4 +40,8 @@ void soc_early_init_hook(void)
* https://github.com/zephyrproject-rtos/zephyr/issues/#34324 ) * https://github.com/zephyrproject-rtos/zephyr/issues/#34324 )
*/ */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1); LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
#ifdef CONFIG_PM
/* Enable Power clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
#endif
} }