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intel_adsp/ace: power: Do not re-implement cache func

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Do not re-implement a function to get a cached pointer. Zephyr cache
API already provides it.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This commit is contained in:
Flavio Ceolin 2024-03-19 21:42:46 +00:00 committed by Maureen Helm
parent 693b65583c
commit f54232e912
1 changed files with 1 additions and 7 deletions
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8
soc/intel/intel_adsp/ace/power.c
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@ -22,8 +22,6 @@
#define LPSRAM_MAGIC_VALUE 0x13579BDF
#define LPSCTL_BATTR_MASK GENMASK(16, 12)
#define SRAM_ALIAS_BASE 0xA0000000
#define SRAM_ALIAS_MASK 0xF0000000
#if CONFIG_SOC_INTEL_ACE15_MTPM
/* Used to force any pending transaction by HW issuing an upstream read before
@ -53,10 +51,6 @@ __imr void power_init(void)
#ifdef CONFIG_PM
#define uncache_to_cache(address) \
((__typeof__(address))(((uint32_t)(address) & \
~SRAM_ALIAS_MASK) | SRAM_ALIAS_BASE))
#define L2_INTERRUPT_NUMBER 4
#define L2_INTERRUPT_MASK (1<<L2_INTERRUPT_NUMBER)
@ -340,7 +334,7 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
/* do power down - this function won't return */
ret = pm_device_runtime_put(INTEL_ADSP_HST_DOMAIN_DEV);
__ASSERT_NO_MSG(ret == 0);
power_down(true, uncache_to_cache(&hpsram_mask),
power_down(true, sys_cache_cached_ptr_get(&hpsram_mask),
true);
} else {
power_gate_entry(cpu);