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drivers: spi: xec_qmspi: Convert to using DT_INST macros

Browse source 
Convert driver to use instance macro's instead of dts_fixup.h based
macros.  This moves us closer to removing both dts_fixup.h and per
instance Kconfig symbols.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2020-04-24 13:46:55 -07:00 committed by Kumar Gala
parent e63f1b278b
commit f59d56b534
4 changed files with 26 additions and 57 deletions
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10
boards/arm/mec1501modular_assy6885/pinmux.c
View file

@ -382,9 +382,9 @@ static int board_pinmux_init(struct device *dev)
#if DT_HAS_NODE(DT_INST(0, microchip_xec_qmspi))
mchp_pcr_periph_slp_ctrl(PCR_QMSPI, MCHP_PCR_SLEEP_DIS);
#if DT_SPI_XEC_QMSPI_0_PORT_SEL == 0
#if DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0
/* Port 0: Shared SPI pins. Shared has two chip selects */
#if DT_SPI_XEC_QMSPI_0_CHIP_SELECT == 0
#if DT_PROP(DT_INST(0, microchip_xec_qmspi), chip_select) == 0
pinmux_pin_set(portb, MCHP_GPIO_055, MCHP_GPIO_CTRL_MUX_F2);
#else
pinmux_pin_set(porta, MCHP_GPIO_002, MCHP_GPIO_CTRL_MUX_F2);
@ -392,7 +392,7 @@ static int board_pinmux_init(struct device *dev)
pinmux_pin_set(portb, MCHP_GPIO_056, MCHP_GPIO_CTRL_MUX_F2);
pinmux_pin_set(porte, MCHP_GPIO_223, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(porte, MCHP_GPIO_224, MCHP_GPIO_CTRL_MUX_F2);
#if DT_SPI_XEC_QMSPI_0_LINES == 4
#if DT_PROP(DT_INST(0, microchip_xec_qmspi), lines) == 4
pinmux_pin_set(porte, MCHP_GPIO_227, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(porta, MCHP_GPIO_016, MCHP_GPIO_CTRL_MUX_F2);
#endif
@ -403,11 +403,11 @@ static int board_pinmux_init(struct device *dev)
pinmux_pin_set(portc, MCHP_GPIO_125, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portc, MCHP_GPIO_121, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portc, MCHP_GPIO_122, MCHP_GPIO_CTRL_MUX_F1);
#if DT_SPI_XEC_QMSPI_0_LINES == 4
#if DT_PROP(DT_INST(0, microchip_xec_qmspi), lines) == 4
pinmux_pin_set(portc, MCHP_GPIO_123, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portc, MCHP_GPIO_126, MCHP_GPIO_CTRL_MUX_F1);
#endif
#endif /* DT_SPI_XEC_QMSPI_0_PORT_SEL == 0 */
#endif /* DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0 */
#endif /* DT_HAS_NODE(DT_INST(0, microchip_xec_qmspi)) */
#endif /* CONFIG_SPI_XEC_QMSPI */

10
boards/arm/mec15xxevb_assy6853/pinmux.c
View file

@ -382,9 +382,9 @@ static int board_pinmux_init(struct device *dev)
#if DT_HAS_NODE(DT_INST(0, microchip_xec_qmspi))
mchp_pcr_periph_slp_ctrl(PCR_QMSPI, MCHP_PCR_SLEEP_DIS);
#if DT_SPI_XEC_QMSPI_0_PORT_SEL == 0
#if DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0
/* Port 0: Shared SPI pins. Shared has two chip selects */
#if DT_SPI_XEC_QMSPI_0_CHIP_SELECT == 0
#if DT_PROP(DT_INST(0, microchip_xec_qmspi), chip_select) == 0
pinmux_pin_set(portb, MCHP_GPIO_055, MCHP_GPIO_CTRL_MUX_F2);
#else
pinmux_pin_set(porta, MCHP_GPIO_002, MCHP_GPIO_CTRL_MUX_F2);
@ -392,7 +392,7 @@ static int board_pinmux_init(struct device *dev)
pinmux_pin_set(portb, MCHP_GPIO_056, MCHP_GPIO_CTRL_MUX_F2);
pinmux_pin_set(porte, MCHP_GPIO_223, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(porte, MCHP_GPIO_224, MCHP_GPIO_CTRL_MUX_F2);
#if DT_SPI_XEC_QMSPI_0_LINES == 4
#if DT_PROP(DT_INST(0, microchip_xec_qmspi), lines) == 4
pinmux_pin_set(porte, MCHP_GPIO_227, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(porta, MCHP_GPIO_016, MCHP_GPIO_CTRL_MUX_F2);
#endif
@ -403,11 +403,11 @@ static int board_pinmux_init(struct device *dev)
pinmux_pin_set(portc, MCHP_GPIO_125, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portc, MCHP_GPIO_121, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portc, MCHP_GPIO_122, MCHP_GPIO_CTRL_MUX_F1);
#if DT_SPI_XEC_QMSPI_0_LINES == 4
#if DT_PROP(DT_INST(0, microchip_xec_qmspi), lines) == 4
pinmux_pin_set(portc, MCHP_GPIO_123, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portc, MCHP_GPIO_126, MCHP_GPIO_CTRL_MUX_F1);
#endif
#endif /* DT_SPI_XEC_QMSPI_0_PORT_SEL == 0 */
#endif /* DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0 */
#endif /* DT_HAS_NODE(DT_INST(0, microchip_xec_qmspi)) */
#endif /* CONFIG_SPI_XEC_QMSPI */

30
drivers/spi/spi_xec_qmspi.c
View file

@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT microchip_xec_qmspi
#include <logging/log.h>
LOG_MODULE_REGISTER(spi_xec, CONFIG_SPI_LOG_LEVEL);
@ -142,12 +144,12 @@ static u32_t qmspi_config_get_lines(const struct spi_config *config)
case SPI_LINES_SINGLE:
qlines = MCHP_QMSPI_C_IFM_1X;
break;
#if DT_SPI_XEC_QMSPI_0_LINES > 1
#if DT_INST_PROP(0, lines) > 1
case SPI_LINES_DUAL:
qlines = MCHP_QMSPI_C_IFM_2X;
break;
#endif
#if DT_SPI_XEC_QMSPI_0_LINES > 2
#if DT_INST_PROP(0, lines) > 2
case SPI_LINES_QUAD:
qlines = MCHP_QMSPI_C_IFM_4X;
break;
@ -207,7 +209,7 @@ static int qmspi_configure(struct device *dev,
/* chip select */
smode = regs->MODE & ~(MCHP_QMSPI_M_CS_MASK);
#if DT_SPI_XEC_QMSPI_0_CHIP_SELECT == 0
#if DT_INST_PROP(0, chip_select) == 0
smode |= MCHP_QMSPI_M_CS0;
#else
smode |= MCHP_QMSPI_M_CS1;
@ -649,22 +651,22 @@ static const struct spi_driver_api spi_qmspi_driver_api = {
#define XEC_QMSPI_0_CS_TIMING XEC_QMSPI_CS_TIMING_VAL( \
DT_SPI_XEC_QMSPI_0_DCSCKON, \
DT_SPI_XEC_QMSPI_0_DCKCSOFF, \
DT_SPI_XEC_QMSPI_0_DLDH, \
DT_SPI_XEC_QMSPI_0_DCSDA)
DT_INST_PROP(0, dcsckon), \
DT_INST_PROP(0, dckcsoff), \
DT_INST_PROP(0, dldh), \
DT_INST_PROP(0, dcsda))
#ifdef DT_SPI_XEC_QMSPI_0_BASE_ADDRESS
#if DT_HAS_NODE(DT_INST(0, microchip_xec_qmspi))
static const struct spi_qmspi_config spi_qmspi_0_config = {
.regs = (QMSPI_Type *)DT_SPI_XEC_QMSPI_0_BASE_ADDRESS,
.regs = (QMSPI_Type *)DT_INST_REG_ADDR(0),
.cs_timing = XEC_QMSPI_0_CS_TIMING,
.girq = MCHP_QMSPI_GIRQ_NUM,
.girq_pos = MCHP_QMSPI_GIRQ_POS,
.girq_nvic_direct = MCHP_QMSPI_GIRQ_NVIC_DIRECT,
.irq_pri = DT_SPI_XEC_QMSPI_0_IRQ_PRI,
.chip_sel = DT_SPI_XEC_QMSPI_0_CHIP_SELECT,
.width = DT_SPI_XEC_QMSPI_0_LINES
.irq_pri = DT_INST_IRQ(0, priority),
.chip_sel = DT_INST_PROP(0, chip_select),
.width = DT_INST_PROP(0, lines)
};
static struct spi_qmspi_data spi_qmspi_0_dev_data = {
@ -673,9 +675,9 @@ static struct spi_qmspi_data spi_qmspi_0_dev_data = {
};
DEVICE_AND_API_INIT(spi_xec_qmspi_0,
DT_SPI_XEC_QMSPI_0_LABEL,
DT_INST_LABEL(0),
&qmspi_init, &spi_qmspi_0_dev_data,
&spi_qmspi_0_config, POST_KERNEL,
CONFIG_SPI_INIT_PRIORITY, &spi_qmspi_driver_api);
#endif /* DT_SPI_XEC_QMSPI_0_BASE_ADDRESS */
#endif /* DT_HAS_NODE(DT_INST(0, microchip_xec_qmspi)) */

33
soc/arm/microchip_mec/mec1501/dts_fixup.h
View file

@ -59,36 +59,3 @@
#define DT_RTC_0_NAME DT_LABEL(DT_INST(0, microchip_xec_timer))
#define DT_KSCAN_0_NAME DT_LABEL(DT_INST(0, microchip_xec_kscan))
#define DT_SPI_XEC_QMSPI_0_LABEL \
DT_MICROCHIP_XEC_QMSPI_40070000_LABEL
#define DT_SPI_XEC_QMSPI_0_BASE_ADDRESS \
DT_MICROCHIP_XEC_QMSPI_40070000_BASE_ADDRESS
#define DT_SPI_XEC_QMSPI_0_IRQ \
DT_MICROCHIP_XEC_QMSPI_40070000_IRQ_0
#define DT_SPI_XEC_QMSPI_0_IRQ_PRI \
DT_MICROCHIP_XEC_QMSPI_40070000_IRQ_0_PRIORITY
#define DT_SPI_XEC_QMSPI_0_PORT_SEL \
DT_MICROCHIP_XEC_QMSPI_40070000_PORT_SEL
#define DT_SPI_XEC_QMSPI_0_LINES \
DT_MICROCHIP_XEC_QMSPI_40070000_LINES
#define DT_SPI_XEC_QMSPI_0_RXDMA \
DT_MICROCHIP_XEC_QMSPI_40070000_RXDMA
#define DT_SPI_XEC_QMSPI_0_TXDMA \
DT_MICROCHIP_XEC_QMSPI_40070000_TXDMA
#define DT_SPI_XEC_QMSPI_0_GIRQ \
DT_MICROCHIP_XEC_QMSPI_40070000_GIRQ
#define DT_SPI_XEC_QMSPI_0_GIRQ_POS \
DT_MICROCHIP_XEC_QMSPI_40070000_GIRQ_POS
#define DT_SPI_XEC_QMSPI_0_CLOCK_FREQUENCY \
DT_MICROCHIP_XEC_QMSPI_40070000_CLOCK_FREQUENCY
#define DT_SPI_XEC_QMSPI_0_CHIP_SELECT \
DT_MICROCHIP_XEC_QMSPI_40070000_CHIP_SELECT
#define DT_SPI_XEC_QMSPI_0_DCSCKON \
DT_MICROCHIP_XEC_QMSPI_40070000_DCSCKON
#define DT_SPI_XEC_QMSPI_0_DCKCSOFF \
DT_MICROCHIP_XEC_QMSPI_40070000_DCKCSOFF
#define DT_SPI_XEC_QMSPI_0_DLDH \
DT_MICROCHIP_XEC_QMSPI_40070000_DLDH
#define DT_SPI_XEC_QMSPI_0_DCSDA \
DT_MICROCHIP_XEC_QMSPI_40070000_DCSDA