drivers: adc: stm32 adc driver must wait about 1ms after enabling
After enabling the ADC, the peripheral has a certain delay (about 1ms) to set its ADC Ready flag in the ADC ISR register. In between, the ADRDY is still 0 and the ADEN is 1 in the CR. The ADC can be used for conversion, only when the ADRDY bit is set Signed-off-by: Francois Ramu <francois.ramu@st.com>
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1 changed files with 8 additions and 8 deletions
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@ -666,21 +666,21 @@ static int adc_stm32_enable(ADC_TypeDef *adc)
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LL_ADC_ClearFlag_ADRDY(adc);
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LL_ADC_ClearFlag_ADRDY(adc);
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LL_ADC_Enable(adc);
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LL_ADC_Enable(adc);
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/*
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/*
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* Enabling ADC modules in L4, WB, G0 and G4 series may fail if they are
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* Enabling ADC modules in WL, L4, WB, G0 and G4 series may fail if they are
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* still not stabilized, this will wait for a short time to ensure ADC
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* still not stabilized, this will wait for a short time (about 1ms)
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* modules are properly enabled.
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* to ensure ADC modules are properly enabled.
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*/
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*/
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uint32_t count_timeout = 0;
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uint32_t count_timeout = 0;
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while (LL_ADC_IsActiveFlag_ADRDY(adc) == 0) {
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while (LL_ADC_IsActiveFlag_ADRDY(adc) == 0) {
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if (LL_ADC_IsEnabled(adc) == 0UL) {
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if (LL_ADC_IsEnabled(adc) == 0UL) {
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LL_ADC_Enable(adc);
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LL_ADC_Enable(adc);
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count_timeout++;
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}
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if (count_timeout == 10) {
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count_timeout++;
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return -ETIMEDOUT;
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k_busy_wait(100);
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}
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if (count_timeout >= 10) {
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return -ETIMEDOUT;
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}
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}
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}
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}
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#else
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#else
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