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dts: arm64: intel: Remove hard-coded clock values

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Remove hard-coded clock values from device tree nodes,
instead read the clock values from the clock controller
during run time.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
This commit is contained in:
Girisha Dengi 2024-09-08 14:16:22 +08:00 committed by Anas Nashif
parent 36e71c839f
commit fbdf6e3463
1 changed files with 7 additions and 6 deletions
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13
dts/arm64/intel/intel_socfpga_agilex5.dtsi
View file

@ -1,13 +1,14 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (C) 2024, Intel Corporation
* Copyright (C) 2023, Intel Corporation
*
*/
#include <arm64/armv8-a.dtsi>
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
#include <zephyr/dt-bindings/reset/intel_socfpga_reset.h>
#include <zephyr/dt-bindings/clock/intel_socfpga_clock.h>
#include <mem.h>
/ {
@ -108,7 +109,7 @@
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-names = "irq_0";
clock-frequency = <100000000>;
clocks = <&clock INTEL_SOCFPGA_CLOCK_UART>;
resets = <&reset RSTMGR_UART0_RSTLINE>;
status = "disabled";
};
@ -140,7 +141,7 @@
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
reg = <0x10c03000 0x100>;
clock-frequency = <100000000>;
clocks = <&clock INTEL_SOCFPGA_CLOCK_TIMER>;
resets = <&reset RSTMGR_SPTIMER0_RSTLINE>;
status = "disabled";
};
@ -151,7 +152,7 @@
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
reg = <0x10c03100 0x100>;
clock-frequency = <100000000>;
clocks = <&clock INTEL_SOCFPGA_CLOCK_TIMER>;
resets = <&reset RSTMGR_SPTIMER1_RSTLINE>;
status = "disabled";
};
@ -162,7 +163,7 @@
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
reg = <0x10D00000 0x100>;
clock-frequency = <100000000>;
clocks = <&clock INTEL_SOCFPGA_CLOCK_TIMER>;
resets = <&reset RSTMGR_L4SYSTIMER0_RSTLINE>;
status = "disabled";
};
@ -173,7 +174,7 @@
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
reg = <0x10D00100 0x100>;
clock-frequency = <100000000>;
clocks = <&clock INTEL_SOCFPGA_CLOCK_TIMER>;
resets = <&reset RSTMGR_L4SYSTIMER1_RSTLINE>;
};