boards: ambiq: enable the ITM in Ambiq boards

This commit defines the default pinctrl of ITM for Apollo3 and
Apollo4 EVB. Also configures the default SWO frequency.

Signed-off-by: Aaron Ye <aye@ambiq.com>
This commit is contained in:
Aaron Ye 2024-10-30 15:15:38 +08:00 committed by Anas Nashif
parent 390f8329b4
commit fe3c0ecb53
12 changed files with 81 additions and 0 deletions

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@ -0,0 +1,11 @@
# SPDX-License-Identifier: Apache-2.0
#
# Copyright (c) 2024 Ambiq Micro Inc. <www.ambiq.com>
if BOARD_APOLLO3_EVB
config LOG_BACKEND_SWO_FREQ_HZ
default 1000000
depends on LOG_BACKEND_SWO
endif # BOARD_APOLLO3_EVB

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@ -17,6 +17,11 @@
input-enable;
};
};
itm_default: itm_default {
group1 {
pinmux = <SWO_P41>;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <M0SCL_P5>, <M0SDAWIR3_P6>;

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@ -98,6 +98,12 @@
status = "okay";
};
&itm {
pinctrl-0 = <&itm_default>;
pinctrl-names = "default";
status = "okay";
};
&wdt0 {
status = "okay";
};

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@ -0,0 +1,11 @@
# SPDX-License-Identifier: Apache-2.0
#
# Copyright (c) 2024 Ambiq Micro Inc. <www.ambiq.com>
if BOARD_APOLLO3P_EVB
config LOG_BACKEND_SWO_FREQ_HZ
default 1000000
depends on LOG_BACKEND_SWO
endif # BOARD_APOLLO3P_EVB

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@ -17,6 +17,11 @@
input-enable;
};
};
itm_default: itm_default {
group1 {
pinmux = <SWO_P41>;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <M0SCL_P5>, <M0SDAWIR3_P6>;

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@ -98,6 +98,12 @@
status = "okay";
};
&itm {
pinctrl-0 = <&itm_default>;
pinctrl-names = "default";
status = "okay";
};
&wdt0 {
status = "okay";
};

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@ -4,6 +4,10 @@
if BOARD_APOLLO4P_BLUE_KXR_EVB
config LOG_BACKEND_SWO_FREQ_HZ
default 1000000
depends on LOG_BACKEND_SWO
if BT
config MAIN_STACK_SIZE

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@ -16,6 +16,11 @@
input-enable;
};
};
itm_default: itm_default {
group1 {
pinmux = <SWO_P28>;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <M0SCL_P5>, <M0SDAWIR3_P6>;

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@ -69,6 +69,12 @@
status = "okay";
};
&itm {
pinctrl-0 = <&itm_default>;
pinctrl-names = "default";
status = "okay";
};
&counter0 {
status = "okay";
};

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@ -0,0 +1,11 @@
# SPDX-License-Identifier: Apache-2.0
#
# Copyright (c) 2024 Ambiq Micro Inc. <www.ambiq.com>
if BOARD_APOLLO4P_EVB
config LOG_BACKEND_SWO_FREQ_HZ
default 1000000
depends on LOG_BACKEND_SWO
endif # BOARD_APOLLO4P_EVB

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@ -17,6 +17,11 @@
input-enable;
};
};
itm_default: itm_default {
group1 {
pinmux = <SWO_P28>;
};
};
adc0_default: adc0_default{
group1 {
pinmux = <ADCSE4_P15>, <ADCSE7_P12>;

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@ -69,6 +69,12 @@
status = "okay";
};
&itm {
pinctrl-0 = <&itm_default>;
pinctrl-names = "default";
status = "okay";
};
&adc0 {
compatible = "ambiq,adc";
pinctrl-0 = <&adc0_default>;