dts: arm: st: h723/h7a3: add digi_dietemp node into DTSI file
Add a digi_dietemp node for the STM32 Digital Temperature Sensor into stm32h723.dtsi (used as a base for H723, H725, H730 and H735) and stm32h7a3.dtsi (used as a base for H7A3, H7B0 and H7B3). The sensor is not available on other H7 SoCs. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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2 changed files with 18 additions and 0 deletions
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@ -177,6 +177,15 @@
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status = "disabled";
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status = "disabled";
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};
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};
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};
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};
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digi_die_temp: digi_dietemp@58006800 {
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compatible = "st,stm32-digi-temp";
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reg = <0x58006800 0x400>;
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interrupts = <147 0>;
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interrupt-names = "digi_temp";
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clocks = <&rcc STM32_CLOCK_BUS_APB4 0x04000000>;
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status = "disabled";
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};
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};
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};
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/* D1 domain, AXI SRAM (128KB with shared ITCM 192KB as `TCM_AXI_SHARED` is `000`) */
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/* D1 domain, AXI SRAM (128KB with shared ITCM 192KB as `TCM_AXI_SHARED` is `000`) */
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@ -97,6 +97,15 @@
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health-test-magic = <0x17590abc>;
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health-test-magic = <0x17590abc>;
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health-test-config = <0x72ac>;
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health-test-config = <0x72ac>;
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};
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};
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digi_die_temp: digi_dietemp@58006800 {
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compatible = "st,stm32-digi-temp";
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reg = <0x58006800 0x400>;
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interrupts = <147 0>;
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interrupt-names = "digi_temp";
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clocks = <&rcc STM32_CLOCK_BUS_APB4 0x04000000>;
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status = "disabled";
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};
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};
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};
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/* System data RAM accessible over AXI bus: AXI SRAM1 in CD domain */
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/* System data RAM accessible over AXI bus: AXI SRAM1 in CD domain */
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