diff --git a/boards/arduino/uno_r4/arduino_uno_r4_common.dtsi b/boards/arduino/uno_r4/arduino_uno_r4_common.dtsi
index 6a81cec8b7d..f9fff37eaab 100644
--- a/boards/arduino/uno_r4/arduino_uno_r4_common.dtsi
+++ b/boards/arduino/uno_r4/arduino_uno_r4_common.dtsi
@@ -64,12 +64,30 @@
 	clock-frequency = <48000000>;
 };
 
-&cgc {
-	clock-source = <&hoco>;
-	iclk-div = <1>;
-	pclka-div = <1>;
-	pclkb-div = <2>;
-	pclkc-div = <1>;
-	pclkd-div = <1>;
-	fclk-div = <2>;
+&pclkblock {
+	clocks = <&hoco>;
+};
+
+&iclk {
+	div = <1>;
+};
+
+&pclka {
+	div = <1>;
+};
+
+&pclkb {
+	div = <2>;
+};
+
+&pclkc {
+	div = <1>;
+};
+
+&pclkd {
+	div = <1>;
+};
+
+&fclk {
+	div = <2>;
 };
diff --git a/boards/arduino/uno_r4/arduino_uno_r4_minima-pinctrl.dtsi b/boards/arduino/uno_r4/arduino_uno_r4_minima-pinctrl.dtsi
index c9538829a48..863d9e6030a 100644
--- a/boards/arduino/uno_r4/arduino_uno_r4_minima-pinctrl.dtsi
+++ b/boards/arduino/uno_r4/arduino_uno_r4_minima-pinctrl.dtsi
@@ -4,12 +4,18 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-r7fa4m1xxxxxx.h>
+#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
 
 &pinctrl {
 	sci2_default: sci2_default {
 		group1 {
-			pinmux = <P301_RXD2>, <P302_TXD2>;
+			/* tx */
+			psels = <RA_PSEL(RA_PSEL_SCI_2, 3, 2)>;
+			drive-strength = "medium";
+		};
+		group2 {
+			/* rx */
+			psels = <RA_PSEL(RA_PSEL_SCI_2, 3, 1)>;
 		};
 	};
 };
diff --git a/boards/arduino/uno_r4/arduino_uno_r4_wifi-pinctrl.dtsi b/boards/arduino/uno_r4/arduino_uno_r4_wifi-pinctrl.dtsi
index 093d4e4cdf9..9add47e4723 100644
--- a/boards/arduino/uno_r4/arduino_uno_r4_wifi-pinctrl.dtsi
+++ b/boards/arduino/uno_r4/arduino_uno_r4_wifi-pinctrl.dtsi
@@ -4,12 +4,18 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-r7fa4m1xxxxxx.h>
+#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
 
 &pinctrl {
 	sci2_default: sci2_default {
 		group1 {
-			pinmux = <P301_RXD2>, <P302_TXD2>;
+			/* tx */
+			psels = <RA_PSEL(RA_PSEL_SCI_2, 3, 2)>;
+			drive-strength = "medium";
+		};
+		group2 {
+			/* rx */
+			psels = <RA_PSEL(RA_PSEL_SCI_2, 3, 1)>;
 		};
 	};
 };