* Disable handwritten check so we can override from board defs
* Shrink HEAP for netcpu so it fits.
* Disable netcpu logging so it doesn't conflict with appcpu.
P1.7 used for led 0 was not passing gpio_api_1pin test (probably
shortened with another pin in the test setup. Use different pin
that passes the gpio_api_1pin test. At current stage this PDK is
'virtual' so this pin is not attached to any LED and it can be
changed.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This commit removes all references to the `xtools` toolchain variant in the
board YAML files.
Note that the `xtools` toolchain variant has been deprecated since Zephyr
v3.3.0 and now removed.
The removal process was automated using the following command line:
git grep -l xtools -- boards/*.{yml,yaml} | \
xargs -n 1 -P $(nproc) \
yq -i 'del(.toolchain[] | select(. == "xtools"))'
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
nrf54l20pdk and nrf54l09pdk must use 64 MHz for now. So far it was
done by using SOC_NRF54LX_SKIP_CLOCK_CONFIG Kconfig option which was
skipping oscillator configuration so that it was running the default
frequency (which is 64 MHz). This approach was a bit cryptic because
DT was indicating that CPU was running 128 MHz when actual frequency
was different (and it was relying on assumption that default frequency
is 64 MHz).
After adding hfpll as clock source for CPU Kconfig option can
be replaced with DT setting where actual frequency is correctly
indicated. Since hfpll is a clock source for fast peripherals (e.g.
TIMER00) it is possible to have single source of information
regarding frequency.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Enable execution of i2c driver tests by adding i2c entry to
the list of supported peripherals.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Now that MbedTLS is capable of automatically enabling
CONFIG_ENTROPY_GENERATOR (when available), we can remove forced
enablements in boards|soc deconfig files.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Secure domain firmware v9.0.0 and onward no longer supports the
non-essential domain reset procedure which was used in the custom
JLink reset scheme for
nrf54h20dk/nrf54h20/cpuapp, nrf54h20dk/nrf54h20/cpurad,
nrf9280pdk/nrf9280/cpuapp and nrf9280pdk/nrf9280/cpurad.
All resets done through the ADAC interface now do a global reset
instead, which as of now "kills" the JLink session.
Remove the custom reset behavior as it will not work anymore moving
forward. This means that "monitor reset" in GDB can no longer be used
to debug the application from the start of execution. Using current
tooling, it is possible to debug from the start of execution by first
resetting the cores into a halted state, starting cores other than the
one you are debugging and then attaching GDB. For example:
> nrfutil device reset --reset-kind RESET_VIA_SECDOM
> nrfutil device go --core Network
> west attach
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
The real, applicable and trusted values are the ones flashed into BICR.
So, drop DT properties that replicate BICR and use runtime reads to BICR
instead.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The real, applicable and trusted values are the ones flashed into BICR.
So, drop DT properties that replicate BICR and use runtime reads to BICR
instead.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
In nRF53 SoC, the CPUAPP owns all the GPIOs by default.
Therefore, even if the GPIOs are exclusively used by CPUNET,
we must redefine them for CPUAPP and then set up GPIO
forwarding to CPUNET using SoC registers (this is done as
part of the MPSL CX initialization).
Previously, these GPIOs were mistakenly removed from CPUAPP
and defined only for CPUNET. This caused the GPIOs to be
available for CPUNET but still owned by CPUAPP, breaking
SR coexistence.
Signed-off-by: Murali Thokala <Murali.Thokala@nordicsemi.no>
This allows to build samples by twister which depend on 'arduino_gpio',
'arduino_i2c', 'arduino_serial' and 'arduino_spi'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
bicr.json is a supporting file that, if present and
CONFIG_SOC_NRF54H20_GENERATE_BICR=y (default), will be used to generate
a BICR hex file. The schema for the file can be found at
soc/nordic/nrf54h20/bicr/bicrgen-schema.json.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove all USB and CDC ACM configuration in favor of common
configuraiton.
Do not adapt board-specific configurations such as unknown PID/VID or
string descriptors. There is no justification for using them on specific
boards, and we do not have formal approval to use them in the project
tree. Also, we need more uniform configuration, since the main reason
for enabling CDC ACM here is to allow users to run examples like
hello_world right out of the box. Of course, anyone is free to customize
these settings in their fork or downstream project.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This change brings in certain default configurations that are needed
for selection of random number generator, and to set tcp
configuration CONFIG_NET_TCP_ISN_RFC6528=n for nRF7002dk board.
Signed-off-by: Vivekananda Uppunda <vivekananda.uppunda@nordicsemi.no>
ENTROPY_GENERATOR is now automatically enabled if the board
has "zephyr,entropy" chosen property set, so there is no need
to manually select it.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Add the required code for `west debug` to work the FLPR
core over JLink in the nRF54L 05, 10 and 15 devices.
Note that this requries an external J-Link probe, it will not work with
the on-board (OB) probe soldered on the DK.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Added basic support for west debug for nrf54h20
RISC-V cpus: nrf54h20_cpuppr and nrf54h20_cpuppr.
Note external jlink probe needs to be used.
Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
Enable the cpusec IPC and the bellboard nodes for
the nrf54h20dk cpuapp and cpurad targets to enable
communication between domains.
Also enables the region cpurad_ram0x_region since
it is also required for the communication.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Deprecate BT_CTLR, and add a new HAS_BT_CTLR as a virtual option which
specific users (like BT_LL_SW_SPLIT) select. This also means that we can
remove all places that were forcefully enabling the BT_CTLR option, and
instead we now depend on devicetree to get some local LL HCI driver
enabled which in turn also enables the HAS_BT_CTLR option.
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
The nRF54L15 DK can now be used to emulate its lesser siblings, the L05
and the L10. Document this in the board reference so that user are aware
of this fact.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The mechanism for communication between domains requires
extra threads. So change the default value MAX_THREAD_BYTES
to allow usage of more threads.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
There is a mistake and the cpuapp_ram0x_region "reg" value should
start from 0x2f011000.
Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
BT uses PSA Crypto API to perform crypto operations and, on this
platform, these APIs are implemented through Mbed TLS. In order
to properly initialize this library, a random number generator
is required.
* If the platform supports an HW entropy generator (ex: native_sim,
nrf), then ENTROPY_GENERATOR must be used;
* Otherwise (ex: qemu_cortex_m3) test random generator can be
enabled.
Enabling the proper option at board Kconfig level allows for
a more compact code change instead of manually editing _all_
the samples/tests that required this fix.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
The ram0x partitions seem to be not compliant with nRF54H20
architecture and it causes that in the application dts overlay file
it is difficult to extend cpuapp_ram0x_region without modifying
whole layout.
It is better to place cpurad_ram0x_region at the beginning at
2f010000 address and then cpuapp_ram0x_region right after that.
Thanks to that, if the application needs to have more than 256 kB
of RAM, in the application dts overlay file, a user can increase
cpuapp_ram0x_region size up to 2f0be000.
Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
The nRF54L05 and nRF54L10 are identical to the nRF54L15 except for their
memory sizes. Add support for emulating those ICs on the nRF54L15DK.
This commit only adds support for the main application core. Support for
the FLPR core may be added later.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Use the rather logical convention for the name that is applied to other
Nordic boards: <board>_common.dtsi for definitions that are common to
the board itself (LEDs, buttons, etc).
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The nRF54H20 Development Kit version 0.8.0 is no longer supported, given
that they should have all been replaced by 0.9.x.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Status and request GPIOs are missing from the edge connector, add those
to fix Thingy53 + nRF7002EB build.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Remove CONFIG_SDMMC_VOLUME_NAME, and set the disk name based on the
``disk-name`` property. This aligns with other disk drivers, and allows
for multiple instances of the sdmmc_subsys disk driver to be registered.
Add disk-name properties for all in tree definitions for the
sdmmc-subsys disk driver, and change all in tree usage of the disk name
Fixes#75004
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
In preparation of adding a check for dead references, this commit fixes
currently broken zehpyr_file: links.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Extended UICR will not be used as its configurations will be merged
with the UICR registers in NVR.
Memory maps changes are needed to align with pre compiled
firmware.
Signed-off-by: Håkon Amundsen <haakon.amundsen@nordicsemi.no>
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
The nRF54 and nRF92 chips has data cache, which means
the ICMsg and ICBMsg must be configured to follow required
cache alignment of the shared memory.
The `dcache-alignement` needs to be defined for that.
Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
A bunch of copy-paste mistakes when adding the nRF54L15 DK added stale
references to the Preview DK (PDK).
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Doc and .yaml descriptions shall mention retained_mem
in supported features on affected boards.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Update the default memory maps for `nrf54h20dk` and `nrf9280pdk` to
remove the `shared_ram20_region` and `shared_ram3x_region` nodes,
because their child nodes no longer need to be grouped together:
* IPC buffers in RAM20 are statically allocated.
* DMA buffers in RAM3x have separate access owners.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Apply the following changes to `nrf54h20dk` and `nrf9280pdk`:
* Convert `perm-*` properties to the newly introduced `nordic,access`,
both in board files and tests.
* Redefine shared regions to specify multiple access owners per node,
and ensure that each such region is reserved by one domain at a time.
`cpuapp_cpurad_ram0x_region` is only enabled by Radiocore, while
`cpuapp_cpucell_ram0x_region` is only enabled by Application core.
* Divide `shared_ram3x_region` so that each sub-region is owned by a
different domain. Their addresses must be rounded down to fit the
current UICR format.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
The external flash (mx25r64) was accidentally disabled during
testing. The node should be enabled by default like its spi.
This commit removes the status = "disabled";
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
