Add a compile-time check to verify that a domain clock is explicitly
defined if a STM32 ADC is configured to use an asynchronous clock.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The `default y`, which is coupled with
depends on DT_HAS_TI_ADS1112_ENABLED to link the settings with DeviceTree,
which was missing, so I added it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Add Data Memory Barrier during the extended calibration of STM32U5, as it
is done in STM32Cube HAL, to avoid sporadic errors during calibration that
may result in measures that are offset from real values.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Only ADC_REF_INTERNAL reference option is allowed in
adc_mcux_adc16 driver, but the reference is not used
for driver configuration. Internal, external or VDD
can be used in reality depending on SoC type and
its configuration.
Remove the reference option check to allow any reference
option from Devicetree.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
Register all the lpi2c instances.
Add no-power-level property and update driver
to adapt no-power-level property.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Commit 47187a9ec9 made the `pinctrl` property
of STM32 ADCs optional, to allow usage of internal channels without wasting
GPIO pins. However, the driver was not adapted to support this new usecase.
(The real bug comes from commit 93956b2073,
that transitioned from a custom `stm32_dt_pinctrl_configure` function to
the standard `pinctrl_apply_state`, without accounting for the fact that
the former returns 0 when pinctrl is empty, but the latter returns -ENOENT)
Modify the driver to work even if no `pinctrl` is present on the ADC node.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Remove all entries that as not being used.
This also update hal to re-enable warning flags
as such as -Wno-unused-variable.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Select PINCTRL subsystem by drivers which require it.
Prevent the need from enabling this symbol at board or soc level.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Extend the adc_mcux_adc12 adc api to set the ref_internal to
a value of vref-mv property.
Signed-off-by: Marcin Wierzbicki <marcin.wierzbicki@accenture.com>
Enable support for channels >= 16 on devices S32K146 and S32K148.
Channels >= 16 are encoded as 100000b..101111b in SC1[ADCH] field.
Signed-off-by: Marcin Wierzbicki <marcin.wierzbicki@accenture.com>
Update Ambiq adc driver to add apollo4
fixed typ of BUMBER to NUMBER
Move buffer size prio to configuring slots
and enabling the ADC
removed #if defined(CONFIG_PM_DEVICE_RUNTIME)
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
The STM32H5x adc has a special option register that
needs to be set when using channel 0 on adc1.
fixes: #77618
Signed-off-by: Lars Jeppesen <lje@foss.dk>
Some hardware configuration require rely on the ALERT/RDY
pin to know when and ADC conversion is completed.
The polling thread is left as fallback, when the pin
is not defined.
Signed-off-by: Efrain Calderon <efrain.calderon.estrada@gmail.com>
The "channels-num" should not be used here, other system's parts are using
"channel-count" instead for the same purpose.
Also property's description has been сorrected.
Signed-off-by: Andrey VOLKOV <andrey.volkov@munic.io>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
The .ref_internal field in the adc_driver_api
struct was previously unset.
Now it's set to the proper value, 1 V.
Signed-off-by: Julia Azziz <juliaazziz7@gmail.com>
ESP32S3 requires ESP_ADC_CAL_VAL_EFUSE_TP_FIT calibration
scheme. The use of ESP_ADC_CAL_VAL_EFUSE_TP is not supported
in the SoC..
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
The NRF SAADC produces negative values in single ended mode if the
positive input is below 0V (ground). This behavior does not match
the ADC device driver API, which states that in single ended mode,
the readings must be positive [0 .. 2^resolution - 1].
This commit extends the adc_nrfx_saadc device driver to track which
channels in a sequence are configured to be single ended, to then
corrects negative readings for these channels to 0.
This patch only works if the ADC resolution is lower than the sample
bit size. This is the case for 8, 10, 12 and 14 bit resolutions for
the nRF 52, 53 and 91 series which store readings in a int16_t.
The nRF 54H and 54L series store 8-bit resolution readings in a 8-bit
sample size. A check has been added to start_read() to prevent single
ended mode readings if the resolution is 8-bit for these platforms.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Updated nxp lpadc driver, because the phandle type property
'nxp,reference-supply' was removed, and a new phandle-array
type property 'nxp,references' added.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
During channel reads, zero is returned on CRC mismatches: the returned
error variable is not written to after a previous non-zero check. Return
-EIO to mirror other drivers' checksum validation behaviors.
Signed-off-by: Jared Kangas <kangas.jd@gmail.com>
For STM32H7, U5 and WBA, check the LDORDY bit of the ADC ISR register
after enabling the internal regulator. This method is safer than the
delay.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Burst mode enabled on an unused channel causes a freeze during a
conversion consisting of several channels (not including the one with
burst mode enabled).
Discovered on nRF52832 (nRF52-DK) using the following approach:
channels 0-3 are used for application purposes as a sequence
channel 4 is used for battery measurements with oversampling
After few successful conversions the sequence (channels 0-3) freezes the
thread while waiting for semaphore to end the conversion.
Signed-off-by: Maksim Salau <maksim.salau@gmail.com>
Removed PM device runtime support from drivers in PD_SYS domain.
Update the rest device drivers to call pm_device_runtime_get/put()
functions when CONFIG_PM_DEVICE_RUNTIME is enabled.
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
Introduce the stm32h7RS serie to the ADC driver,
based on the stm32h7: two ADC 12 resolution
For stm32h7rs ADC calibration, the
LL_ADC_SetCalibrationFactor is not used.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Expands driver to cover nRF54L15 features like AIN as GPIO configuration,
new reference voltage, different set of supported gain options.
Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
The AD5593 conversion result also contains the channel read and not just a
value:
| adc channel (3 bits) | adc value (12 bits) |
This value was not removed from the result before using it as an adc value.
Reuse the AD5592 code to fix the issue.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Namespaced the generated headers with `zephyr` to prevent
potential conflict with other headers.
Introduce a temporary Kconfig `LEGACY_GENERATED_INCLUDE_PATH`
that is enabled by default. This allows the developers to
continue the use of the old include paths for the time being
until it is deprecated and eventually removed. The Kconfig will
generate a build-time warning message, similar to the
`CONFIG_TIMER_RANDOM_GENERATOR`.
Updated the includes path of in-tree sources accordingly.
Most of the changes here are scripted, check the PR for more
info.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Support regulator output different voltage as reference to LPADC
the regulator output voltage can be set through property
zephyr,vref-mv
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Expands driver to cover nRF54L15 features like AIN as GPIO configuration,
new reference voltage, different set of supported gain options.
Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
Update m2l31x.dtsi for adc support and update adc_numaker.c
to support acquisition time in 0~255 ADC ticks.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
This fixes the problem that `adc_raw_to_millivolts` only returns half of
the actual voltage.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Found via static analyis. When `adc_kb1200_start_read` succeeds, no
value is set for `error` so it is still uninitialized when it is
returned.
Signed-off-by: François Baldassari <francois@memfault.com>
Use information encoded in conversion result value to validate it.
Check if MSB bit is set to zero.
Check if channel number included in the result matches channel
number selected for conversion.
Use bitmask to extract converted value instead of math calculations.
Signed-off-by: Lukasz Madej <l.madej@grinn-global.com>
k_thread_name_set() function returns an error if CONFIG_THREAD_NAME is
not enabled which may make the driver not functional.
Fix the issue by adding a check against CONFIG_THREAD_NAME avaliability
before calling k_thread_name_set() function so the driver can operate
properly with CONFIG_THREAD_NAME disabled.
Signed-off-by: Lukasz Madej <l.madej@grinn-global.com>
Add configuration of internal refference voltage value so raw ADC
readings can be converted to mV utilizing adc_raw_to_millivolts()
ADC API function.
Signed-off-by: Lukasz Madej <l.madej@grinn-global.com>
The adc_ads1119 driver is unable to overwrite the configuration register,
the chip therefore always works with its default settings. Register access
macros are fixed by this commit.
Fixes: #70091
Signed-off-by: Jan Kubiznak <jan.kubiznak@deveritec.com>
Rename ad5592 files in dts, driver and include to ad559x and add support
for I2C bus which is required for AD5593.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add a blank define for the case where DMA channels are defined in ADC node
of the dts but STM32_ADC_DMA is not enabled. Otherwise compilation fails.
Also fix the way the DMA channel is configured by using a standard DT
macro, otherwise it doesn't work for dma-v2bis DMA types.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Added the STM32G0X SOC series to the list of SOC that need to disable the
ADC while setting the oversampling bits to prevent writing over the
CKMODE bits.
Signed-off-by: Alexandre Poizat <apoizat@kalrayinc.com>
Use K_KERNEL_STACK_SIZEOF() for calculating thread stack size, as this
takes K_KERNEL_STACK_RESERVED into account.
Fixes: #69129
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use K_KERNEL_STACK_SIZEOF() for calculating thread stack size, as this
takes K_KERNEL_STACK_RESERVED into account.
Fixes: #69133
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use K_KERNEL_STACK_SIZEOF() for calculating thread stack size, as this
takes K_KERNEL_STACK_RESERVED into account.
Fixes: #69132
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use K_KERNEL_STACK_SIZEOF() for calculating thread stack size, as this
takes K_KERNEL_STACK_RESERVED into account.
Fixes: #69131
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use K_KERNEL_STACK_SIZEOF() for calculating thread stack size, as this
takes K_KERNEL_STACK_RESERVED into account.
Fixes: #69130
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Do not disable the ADC after the end of the measurement to avoid systematic
enabling which is time-consuming in case the configuration is unchanged.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Prevents the system to go in Suspend to RAM low power mode while ADC
measurement is in progress.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
For series that have two sampling time common channels, only one was used.
This commit add the support for the second one. The first two different
acquisition time values are used for the sequence and all further values
must match either of them, otherwise generating an error.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The TLA2021 driver depends on it's i2c controller and therefore needs
to be initialized later. ADC_INIT_PRIORITY by default equals
KERNEL_INIT_PRIORITY_DEVICE which should be used by independent devices.
Using this by default causing projects to fail where this driver is
enabled implicitly through board configuration and the priority is not
explicitly set.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Several STM32 variants include both shared IRQs for some ADCs and
separate IRQs for others (for example, STM32G473 has 5 ADCs, ADC1 and
ADC2 share one IRQ while ADC3, ADC4 and ADC5 each have unique
IRQs). The STM32 ADC driver however previously only supported either
separate IRQ lines for each operational ADC in the devicetree or a
single shared IRQ for all operational ADCs in the devicetree which
prevented all ADCs from being usable at the same time when the variant
contained a mix of both shared and separate ADC IRQ lines (only either
all the shared or all the separate and one of the shared might be used
at most for one application).
To allow for all ADCs in an STM32 variant to be usable in a single
application, generate an ISR and initialization function for each
unique IRQn as defined in the devicetree and give the task of
initialization to the first ADC which connects to that particular
IRQ. Each ISR function will generate code to call the ISR for each ADC
associated with that IRQn as was previously done for
CONFIG_ADC_STM32_SHARED_IRQS, allowing an ISR to be shared for the
ADCs sharing an IRQ while simultaneously providing separate ISRs for
each IRQ. Thus, the only information required to have ADCs either
share an ISR or not is provided by the devicetree.
Signed-off-by: Michael R Rosen <mrrosen@alumni.cmu.edu>
The current driver initializes the IADC with the default configuration
(IADC_INITSINGLE_DEFAULT), which aligns the data to the right.
To correctly read the 12-bit sample, it should be masked from the right
instead.
Signed-off-by: Paulo Santos <pauloroberto.santos@edge.ufal.br>
When using one of the internal channels (die_temp, vbat, vref) the
channels are enabled in the individual drivers and disabled again
whenever an adc conversion is complete.
This creates a race condition if the ADC is used from multiple threads.
This commit moves the disabling of the channels to the individual
drivers.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
Updated API version enables multi-instance GPIOTE driver.
Additionally obsolete symbol that was used to specify
API version in the past was removed.
Affected drivers have been adjusted and appropriate changes
in affected files have been made.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Turning on clock via clock controller and
resetting ADC device via reset controller on initializing.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Configure the sw trigger just after calibration
So the conversion can start on regular channel on the
software control bit.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds support for more STM32 CPUs that has
a different DMA interface. This was tested only for
the nucleo_l476rg.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Previously the STM32 DMA driver was dependent on a very specific
name for the DMA in the DTS. This hidden requirement has caused
a bit of confusion. This commit changes the driver to instead
always use the first DMA listed in the ADC node's dma property.
Should fix: #65387
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Do not enable subsystem/driver shell modules by default and stop abusing
CONFIG_SHELL_MINIMAL, which is internal to the shell subsystem, to decide
when to enable a driver shell.
The list of shell modules has grown considerably through the
years. Enabling CONFIG_SHELL for doing e.g. an interactive debug session
leads to a large number of shell modules also being enabled unless
explicitly disabled, which again leads to non-negligible increases in
RAM/ROM usage.
This commit attempts to establish a policy of subsystem/driver shell
modules being disabled by default, requiring the user/application to
explicitly enable only those needed.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
