Affected CONFIG_ADC_ADS114S0X_GPIO=y build.
register_addresses was wrong type for
ads114s0x_write_multiple_registers()
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Move the syscall_handler.h header, used internally only to a dedicated
internal folder that should not be used outside of Zephyr.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fix the data acquisition thread function signatures to avoid a stack
corruption on thread exit.
Fixes#62637
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Fix the problem not apply pinctrl eventhough the config is defined.
In practice, the setting is equals to soc default.
So, there is no apparent change in behavior.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
"const k_tid_t" is "struct k_thread * const" and not "const struct
k_thread *" as the code may be assuming. Just drop it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Replace Nuvoton NPCX series definitions with new Kconfig definitions in
the npcx drivers. The benefit of this approach is that we won't touch
the npcx driver sources again during introducing a new npcx series next
time.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The macro K_THREAD_STACK_MEMBER has actually been deprecated
since v2.4.0 in the macro doxygen description, but it was
never marked with __DEPRECATED_MACRO. Since this was being
used in various drivers, make it follow the deprecation
process.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
CONFIG_NOCACHE_MEMORY is a valid way of declaring buffers in
nocache regions. Consider them valid in the STM32 ADC driver
nocache check.
Copied from commit 818aa2d
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
For all STM32 ADC that use common sampling times, there is a check made to
ensure that all channels of a sequence use the same sampling time.
The value was not reset between reads, resulting in error if two
consecutive sequences used different values.
This commit adds a reset of this value once read is done.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove CHANNEL_COUNT limit used to check the channel bitmask.
This value was not applicable on STM32L1 where channel can go up to 31.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
On some STM32 families (such as F4), temperature and Vbat sensor share the
same ADC channel, which can lead to conflict when reading them, and wrong
measurement can follow.
To alleviate this problem, this commit moves the setting of the common
path internal channel to the sensor drivers themselves instead of doing
it in the ADC driver.
The teardown is still done in the ADC driver, systematically, instead of
channel by channel (which has the same result).
By moving this logic in the sensor drivers, the properties temp-channel,
vbat-channel and vref-channel becomes useless and are thus removed.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add phandle prop to reference any regulator that must
be enabled in order for the LPADC to function as intended.
Change LPADC driver to use this property if present.
LPADC on LPC55S36 depends on VREF peripheral, enable for this platform.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This is the final step in making the `zephyr,memory-attr` property
actually useful.
The problem with the current implementation is that `zephyr,memory-attr`
is an enum type, this is making very difficult to use that to actually
describe the memory capabilities. The solution proposed in this PR is to
use the `zephyr,memory-attr` property as an OR-ed bitmask of memory
attributes.
With the change proposed in this PR it is possible in the DeviceTree to
mark the memory regions with a bitmask of attributes by using the
`zephyr,memory-attr` property. This property and the related memory
region can then be retrieved at run-time by leveraging a provided helper
library or the usual DT helpers.
The set of general attributes that can be specified in the property are
defined and explained in
`include/zephyr/dt-bindings/memory-attr/memory-attr.h` (the list can be
extended when needed).
For example, to mark a memory region in the DeviceTree as volatile,
non-cacheable, out-of-order:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_VOLATILE |
DT_MEM_NON_CACHEABLE |
DT_MEM_OOO )>;
};
The `zephyr,memory-attr` property can also be used to set
architecture-specific custom attributes that can be interpreted at run
time. This is leveraged, among other things, to create MPU regions out
of DeviceTree defined memory regions on ARM, for example:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-region = "NOCACHE_REGION";
zephyr,memory-attr = <( DT_ARM_MPU(ATTR_MPU_RAM_NOCACHE) )>;
};
See `include/zephyr/dt-bindings/memory-attr/memory-attr-mpu.h` to see
how an architecture can define its own special memory attributes (in
this case ARM MPU).
The property can also be used to set custom software-specific
attributes. For example we can think of marking a memory region as
available to be used for memory allocation (not yet implemented):
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_NON_CACHEABLE |
DT_MEM_SW_ALLOCATABLE )>;
};
Or maybe we can leverage the property to specify some alignment
requirements for the region:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_CACHEABLE |
DT_MEM_SW_ALIGN(32) )>;
};
The conventional and recommended way to deal and manage with memory
regions marked with attributes is by using the provided `mem-attr`
helper library by enabling `CONFIG_MEM_ATTR` (or by using the usual DT
helpers).
When this option is enabled the list of memory regions and their
attributes are compiled in a user-accessible array and a set of
functions is made available that can be used to query, probe and act on
regions and attributes, see `include/zephyr/mem_mgmt/mem_attr.h`
Note that the `zephyr,memory-attr` property is only a descriptive
property of the capabilities of the associated memory region, but it
does not result in any actual setting for the memory to be set. The
user, code or subsystem willing to use this information to do some work
(for example creating an MPU region out of the property) must use either
the provided `mem-attr` library or the usual DeviceTree helpers to
perform the required work / setting.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add all available instances of the ADC series
MAX11102-MAX11117 to the ADC shell.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Remove `threshold-reg-offset` DT property and implement them with static
inline functions in `reg_def.h`
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add multi-device support in npcx adc driver since there is more than one
adc module in npcx4 series. And each adc's reference voltage might be
different, this CL introduces the `vref-mv` prop. to select its own
reference voltage.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Kate Yen <htyen@nuvoton.com>
Now that everything is in place, the prescaler value picked from dts is
used to properly configure the clock.
The code is moved into its own function.
There are four main cases:
- F1 and F37x don't have prescaler (in ADC register) so nothing is done.
- F0 only has individual registers.
- C0, G0, L0, WB1x and WL have both invidual and common registers. The
individual one is used to define either synchronous mode with its
prescaler, or asynchronous mode. The common one is only used to store
the value of the asynchronous prescaler.
- All others only have a common register where both the mode and the
prescaler is stored.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Get the STM32 ADC prescaler data from dts to create the appropriate LL
macro to use for the ADC clock.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This adds support for the max1125x (max11254, max11254)
family of spi adc devices.
Signed-off-by: Mustafa Abdullah Kus <mustafa.kus@sparsetechnology.com>
To allow the ADC API unit test to skip tests for non-implemented
features, return -ENOTSUP.
Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
Fixes#61401
The ADS1x1x driver has a bad habit of assuming i2c operations will
always suceed - this fixes the two worse cases in the code I could
identify (there may yet be more).
* During initial ADC setup, if either of the two I2C operations
(read or write) fails, raise the error immediately to the caller
rather than letting it fall through to the acquisition thread.
This ensures that we only ever attempt to give a result that was
definitely connected to our attempt to start the capture.
* If the acquisition thread encounters an I2C error, raise the error
but do not terminate the aquisition thread. This ensures the
application can attempt to fix the condition that caused the I2C
error and try again.
Signed-off-by: Chris Collins <kuroneko@sysadninjas.net>
Add support ADC SAR for NXP S32. ADC SAR diver
support 3 group channels (precision, standard
and external), run normal trigger in oneshot
conversion mode with 2 callbacks normal end
of conversion and normal end chain callbacks.
An instance only run on 1 group channel and
1 kind of callback at the same time.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:
- changing the CONFIG_SOC_ESP32* to refer to
the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
provide a SOC model config
- introducing the 'common' folder to hide all
commonly used configs and files.
- updating west.yml to reflect previous changes in hal
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Previously, only a single type of ADCs was always available
in the ADC shell. This change enables the usage of the ADC
shell for different ADC types at the same time.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Depending on the ADC implementation it might happen that
the driver is waiting on an external interrupt. If this interrupt
gets lost, for instance due to a race condition with an external
port expander, the system will get stuck.
Making this configurable allows the user to recover from such
an error.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Only 12-bit resolution is currently available in the driver,
and each of the 16-bit samples store the actual data
aligned to the left.
A sample should be shifted 4 bits to the right to allow
proper interpretation.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
When reading multiple ADC channel in parallel, an ADC command chain will be
build. This is similar to a linked list, as every command references the
next command.
Before this patch every ADC command after the first, would always reference
this initial command. So that during execution only two commands (the last
and first) would be executed which resulted in readout of only two analog
values. As Zephyr expected more to come in, the `read_adc` function would
block endlessly.
The patch fixes the behaviour and allows a correct chain to build up.
Signed-off-by: Elisabeth Friedrich <auxsys@flowerpot.me>
The adc_driver_api structure provides .ref_internal
which previously was unset.
Now .ref_internal is set to the proper value.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
The device passed to the DMA callback is the DMA device. Instead use
the ADC device available in the private data.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
This adds a driver for Texas Instruments Cost-Optimized, Ultra-Small,
12-Bit, System-Monitoring ADCs. Currently only TLA2021 is supported,
TLA2022 and TLA2024 may follow based on this driver.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The adc-shell uses a hardcoded list of defines to check whether it should
throw a compile-time error. The ADS1119 and ADS1112 driver both support
the APIs needed by the shell, so this commit enables support for them in
the hardcoded support list.
Signed-off-by: Jordan Montgomery <jordan.montgomery@getcruise.com>
This PR adds a custom driver for the ADS1112 ADCs. Unlike ADS1113/4/5
family served by the ADS1x1x driver, the ADS1112 does not use an address
pointer to address config registers. Instead, there is only one writable
register and all i2c writes will set it. The registers resemble the
ADS1119 device, but config bitmap is different, include a distinct data
rate table, gain table, and input multiplexing table. There is also not a
status register to be monitored with the ADS1112, as it uses config bit 7
for the same purpose instead of a separate register.
The driver was tested on hardware using the ADC shell interface. Manual
probing validated the voltages for the MUX_SINGLE configs at datarate 15
in CM_SINGLE. Higher gains were not tested and CM_CONTINUOUS is not
supported in this initial implementation.
The new driver has also been added to the existing ADC test using adc_emul
for completeness.
Origin: original
License: Apache 2.0
Purpose: Adding support for ADS1112 ADCs
Signed-off-by: Jordan Montgomery <jordan.montgomery@getcruise.com>
The pga enum internal reference voltage and gain values
were fixed in the code, but a comment was forgotten to be
updated. Correct the comment to match how the code uses
the enum.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add a property to the ADC channels which allows the configuration
of the current source pin.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Define two macros for calibration and oversampling for STM32 series that
possess these features, and use these macros instead of a list of series.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Rework oversampling by creating a const table containing possible
oversampling values and using this table instead of switch case.
Also disable ADC for all series before setting oversampling.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Renesas Renesas SmartBond(tm) have two ADC blocks:
GPADC and SDADC.
This change adds drivers for both.
Each ADC supports only one channel setup, drivers allow
to have multiply channels in sequence. Switching
between ADC sources in done in software.
GPADC has 10 bit resolution (accuracy can be increase
with oversampling). Values up to 3.6V can be measured
on selected pins. V30 and VBAT1 can also be measured.
SDADC has 14 bit resolution and can take measurements
from 8 pins (single of differential) and VBAT.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Several sections of the STM32 ADC driver are #ifdef by a combination of the
same SOC defines that share similar IPs. These are F2/F4/F7/L1, and
F1/F37x.
Each of these combinations is now replaced by a specific compatible, which
makes the code a bit lighter and more succinct.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add ifdef around some functions that don't exist for STM32F37x (ADC_V2_5)
like it is done for STM32F1x.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Inverts the logic of some #ifdef, replacing lists of newer series by a
list of NOT older series. This makes it shorter, and more future-proof as
future series are more likely to work out of the box, without need to
manually add a new define in each place.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Some STM32 families that need to check the ADRDY flag after enabling the
ADC were not doing it. The #ifdef has been updated to fix that.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Use the new dts properties for sampling time in the STM32 ADC driver:
- Get the sampling time from dts
- Remove all sampling time macro concatenation.
- Simplify/refactor setting of sampling time
- Check that sampling time is the same for all series using common channel
This also fixes a few cases where wrong sampling times were used for an
ADC instance (like ADC4 on U5, or ADC3 on STM32H723).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Renamed CONFIG_ADC_GECKO to CONFIG_IADC_GECKO to eliminate confusion
between the Incremental ADC found on series 2 silabs gecko MCUs, and the
ADC found on earlier gecko series.
Signed-off-by: Jared Baumann <jared.baumann8@t-mobile.com>
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
SPI configuration did not set bit ordering or more importantly the clock
polarity which seemed to be misconfigured. Setting this corrects one more
quirk when working with this part on the TDK Robokit1
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
To be consistent with the current NXP clocking scheme,
move the LPADC clocking code to the SOC files where
all of the other peripheral clocking is done.
Also remove any other SOC-specific code to the
respective SOC file and out of this driver.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Code for power level property was accidentally
removed by accident from driver in commit 9921c59f40
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
- This includes the driver, test app, and sample app
- Only the boards\arm\cy8cproto_062_4343w board is supported for now
Signed-off-by: Bill Waters <bill.waters@infineon.com>
Simplify the STM32 ADC driver code by using the new ADC resolutions
property in dtsi files.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
- Remove build asserts in favor of DT enums
- Remove power level property since it is unused by SDK
- Correct voltage ref value in DT to correspond to
chip specific values documented in reference manuals
instead of corresponding to SDK enum names.
- Fix SOC devicetrees affected by these changes.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
port commit f7f47dc to stm32h5
Without this fix, ADC driver will hang when reading internal channels.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit adds the Gecko IADC driver and support for it to the
efr32bg_sltb010a board.
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
Move semicolon from end of DT_INST_FOREACH to DEVICE_DT_INST_DEFINE
to make multi-instancing possible. This caused some problems with
CI after adding adc node to native_posix dts.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The below is the unit test result for the driver and kernel of
it82xx2_evb board.
GPIO/gpio_basic_api: PASS
I2C/i2c_api: PASS
Flash: PASS
UART/uart_basic_api: PASS
PWM/pwm_api: PASS
WDT/wdt_basic_api: PASS
KSCAN/kscan_api: PASS
kernel/sched/schedule_api: PASS
kernel/sched/preempt: PASS
kernel/timer/timer_api: PASS
kernel/sleep: PASS
ADC/adc_api: PASS.
ADC note: conversion time~=61.6us
sample time delay~=60us
wait voltage stable time~=202.8us
Set sampling time to 500us will pass for ADC test.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
MISRA Rule 5.7 requires uniqueness of tag identifiers. Shell is
frequently problematic because many code uses `const struct shell
*shell`. This causes CI noise every time one of these shell files is
edited, so let's update all of them with `const struct shell *sh`
instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
add support for async call and repeat sample test
1. change the DMA req to 2 byte each
2. increase the buffer pre-dma
3. add protection on invalid buffer
depends on: PR #56104
fixing: issue #56070
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Removes a workaround that was required while there was a bug in
upstream STM32 HAL drivers where the oversampling was not set
correctly in all cases. This has since been fixed, and also
added to the Zephyr STM32 HAL.
The upstream issue:
https://github.com/STMicroelectronics/STM32CubeH7/issues/177
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
The init infrastructure, found in `init.h`, is currently used by:
- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices
They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:
```c
struct init_entry {
int (*init)(const struct device *dev);
/* only set by DEVICE_*, otherwise NULL */
const struct device *dev;
}
```
As a result, we end up with such weird/ugly pattern:
```c
static int my_init(const struct device *dev)
{
/* always NULL! add ARG_UNUSED to avoid compiler warning */
ARG_UNUSED(dev);
...
}
```
This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:
```c
static int my_init(void)
{
...
}
```
This is achieved using a union:
```c
union init_function {
/* for SYS_INIT, used when init_entry.dev == NULL */
int (*sys)(void);
/* for DEVICE*, used when init_entry.dev != NULL */
int (*dev)(const struct device *dev);
};
struct init_entry {
/* stores init function (either for SYS_INIT or DEVICE*)
union init_function init_fn;
/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
* to know which union entry to call.
*/
const struct device *dev;
}
```
This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.
**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
init: convert SYS_INIT functions to the new signature
Conversion scripted using scripts/utils/migrate_sys_init.py.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
manifest: update projects for SYS_INIT changes
Update modules with updated SYS_INIT calls:
- hal_ti
- lvgl
- sof
- TraceRecorderSource
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: devicetree: devices: adjust test
Adjust test according to the recently introduced SYS_INIT
infrastructure.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: kernel: threads: adjust SYS_INIT call
Adjust to the new signature: int (*init_fn)(void);
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
We get compile warnings of the form:
error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint (and the other is* functions) return an int, change check
to an explicit test against the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Add the support of the new stm32h5 to the stm32 ADC driver
Note : LL_ADC_CLOCK_ASYNC_DIV6 is the value for getting the
expected results of ADC.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Replace pointer construction macro with value from config struct.
Fixes what appears to be an oversight from #55522.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".
Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
After enabling the ADC, the peripheral has a certain delay (about 1ms)
to set its ADC Ready flag in the ADC ISR register.
In between, the ADRDY is still 0 and the ADEN is 1 in the CR.
The ADC can be used for conversion, only when the ADRDY bit is set
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Microchip XEC ADC and ADC V2 driver were merged into one
That PR did not change the ADC API test and ADC shell resulting
in twister build failures. Fixed both ADC API test and ADC shell.
Signed-off-by: scott worley <scott.worley@microchip.com>
Deleted adc_mchp_xec.c and microchip,xec-adc.yaml file.
DTSI, yaml, CMakeLists.txt and Kconfig.xec files are
updated for compatible.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Updated the "adc_mchp_xec_v2.c" adc driver to support both MEC172x and
MEC15xx SOC.
ADC smapling clock configuration updated using DTS.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Rewrite MCUX LPADC driver, to better utilize hardware.
the following changes have been applied:
- channel numbers now correspond to hardware channel command slots,
use "input_positive" and "input_negative" fields along with channel
definitions in dt-bindings/adc/mcux-lpadc.h to select a channel
- the number of channel command slots available is configurable via
CONFIG_LPADC_CHANNEL_COUNT
- Side A and side B channels are now supported
- differential channel mode is now supported
- ADC channels now are sampled via hardware, without additional
software triggering
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
STM32 ADC DMA support added in #52965 incorrectly assumed
that all ADC devices have a OVR flag. This commit changes
the driver to only account for it if it's found in the
LL drivers.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
In the adc_stm32_init() function, when adc_stm32_calib() is called,
the ADC is not yet enabled but still disabled.
This patch makes sure to Disable the ADC before its calibration.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
update MEC172x adc driver to support device PM.
Implement pm resume and suspend actions to put adc
pins in proper state for suspend and resume.
Notify kernel of busy when adc sampling is in progress.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
It is advised to stop any ongoing ADC conversion before
disabling the peripheral.
Added some comments so that ADC state isn't left into
intermediate state that would prevent correctly
enabling or disabling the peripheral
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Add support for side B channels in MCUX LPADC driver. Given
that no instances of the IP block have more than 8 a side channels,
use channel numbers over 8 to indicate side B channel is desired.
Fixes#51076
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fixes using wrong status bit for ADS1119_STATUS_MASK_ID. Moreover
using BIT(8) does not make much sense for working with uint8_t.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Now that we have the information of internal channel number for STM32
ADCs in the dts, we can use it to remove a lot of specific code and
make it clearer.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Slightly refactor STM32_ADC_INIT macro.
adc_stm32_cfg_##index declaration is now part of ADC_STM32_INIT
and extracted from CONFIG_ADC_STM32_SHARED_IRQS #ifdef.
Aim is to minimize code duplication when adding new adc_stm32_cfg_X
or adc_stm32_data_Y entries
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Previously channels could be tore down before a sequence completes,
either when using async, or when ADC_ACTION_REPEAT was specified
The teardown is now moved to after an entire context is complete
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
This optional function allows a driver to do operations
after a complete sampling sequence is completed.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
The adc1 & 2 of the stm32g4 devices share the same irq
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
The ADC4 requires particular sequencer configuration.
Clean section that are not used for the configuration.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Depending on the ADC instance, internal channels
temperature sensor or vbat differ.
That must be adapted so that each internal channels
of ADC4 are operational.
ADC4 is using CommonChannel config for the Sampling time.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The ADC module has four conversion groups, each one is set up as a zephyr
device. The start-up calibration is initiated globally for all groups
and it is run in each device init function. The ADC module supports post
calibration per group. Post calibration is run automatically after each
group acquires the samples.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
`spi_is_ready` function is being deprecated in favor of
`spi_is_ready_dt` so let's replace the old usage in the tree.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Add support for setting the help description for each entry in a dictionary
command. Currently the syntax string alone may not provide sufficient
description of its entry. This commit also helps keep the help messages
consistent with existing style.
Signed-off-by: Xinyang Tan <xinyang.tan@delve.com>
Add CONFIG_CRC for building CRC related routines.
CRC routines are now being built for each application, whether used or
not and are add in the build system unconditionally.
Keep CONFIG_CRC enabled by default for now and until all users have
converted to use the new option.
Partial fix for #50654
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The ADS1x13 does not have a PGA, and will have a fixed
internal reference voltage of 2048mV. This sets the internal
referece voltage for the ads1x1x to 2048 and adjust the gain
configuration to scale.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
New ADC driver for the TI CC13xx/CC26xx family.
ADC channel configurations are translated from Zephyr constants to
simplelink driverlib ones (e.g., sample times use a lookup table).
Async mode was also implemented & tested.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
ADC comparator driver submits notifications into system work queue, this
change will make driver to use dedicated work queue instead by using
`CONFIG_ADC_CMP_NPCX_WORKQUEUE`.
Dedicated work queue and priority are configurable as well.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Set the synchronous clock mode to HCLK/1 (DIV1) or HCLK/2 (DIV2)
Both are valid common clock setting values.
The HCLK/1 (DIV1) is possible only if the ahb-prescaler = <1>
in the RCC_CFGR (see DTS).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This Commit makes the adc configuration correct
for using the adc with 12b conversion on the stm32wl.
TriggerSource must be set to SW.
The ADC clock must be disabled by clock gating during CPU1 sleep/stop.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 adc. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The ADC of the stm32U5 should also waits for the ready Flag
before enabling the peripheral, then wait for the ready Flag
set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introducing RaspberryPi Pico ADC driver.
This driver was created with reference to the adc_emul implementation.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Use the clock control API to turn on ADC clocks. Note that clock
selection is not yet implemented, so we still rely on custom rcu
properties for that.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Internal channel should be torn after ADC read, this is
especially the case for VBAT, where the connection of internal
channel will introduce current drainage.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).
Automated using:
```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The stm32U5 LL function name differs from stm32H7 serie but must
still be enabled in the PCSEL.
This is done with the LL_ADC_SetChannelPreselection function
until the LL changes its name.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
It is frequent to find variable definitions like this:
```c
static const struct device *dev = DEVICE_DT_GET(...)
```
That is, module level variables that are statically initialized with a
device reference. Such value is, in most cases, never changed meaning
the variable can also be declared as const (immutable). This patch
constifies all such cases.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
According to the reference manual, the ADC should not be
converting when setting the common path, we disable the adc
directly in this driver for the sake of simplicity.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Remove unnecessary VREFINT path connection during the init.
Internal paths should be setup before reading the channel.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Move the `adc_stm32_setup_channels` function to `start_read`
so that we can guarantee that the internel path is connecte
before reading.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
MISRA C:2012 Rule 14.4 (The controlling expression of an if statement
and the controlling expression of an iteration-statement shall have
essentially Boolean type.)
Use `do { ... } while (false)' instead of `do { ... } while (0)'.
Use comparisons with zero instead of implicitly testing integers.
The commit is a subset of the original auditable-branch commit:
5d02614e34a86b549c7707d3d9f0984bc3a5f22a
Signed-off-by: Simon Hein <SHein@baumer.com>
The VREFINT and TEMPSENSOR internal channels have a stabilization time
after they are enabled. Right now this just causes the first measure to
be a bit off, however with PR #47691 which stops the internal channels
after each readout, this is something important to respect. Fortunately
the stabilization time is available as constants in the HAL, so just
wait the time specified by the constants.
Note that the VBAT internal channel does not have any stabilization
time.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Update adc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Any project with Kconfig option CONFIG_LEGACY_INCLUDE_PATH set to n
couldn't be built because some files were missing zephyr/ prefix in
includes
Re-run the migrate_includes.py script to fix all legacy include paths
Signed-off-by: Tomislav Milkovic <milkovic@byte-lab.com>
For SAML21-based parts, the REFCTRL register is locked while the ADC is
enabled. Permit some parts to declare that they need the ADC to be
disabled before modifying REFCTRL.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Convert driver to use DEVICE_DT_INST_DEFINE. Its already devicetree
based so trivial change over to use DEVICE_DT_INST_DEFINE.
Signed-off-by: Kumar Gala <galak@kernel.org>
In some case the structure enclosing the adc context
can be quite big, making static initialization quite
resource consuming
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
This commit avoid re-enabling the ADC,
because this starts conversion.
According to the RefMan (RM0008) of the stm32F10x mcu,
enabling the ADC will start the conversion
if the ADC is already enabled. "Conversion starts when
this bit holds a value of 1 and a 1 is written to it."
That's not what we want.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The value is unused in this structure is unused and can be accessed
through the adc_ref_internal() function.
This saves 4 bytes of SRAM.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Allow the battery voltage to be read through the ADC even if the
CONFIG_STM32_VBAT driver is not enabled.
I guessed this part of code is conditionally compiled depending on
CONFIG_STM32_VBAT because this feature, and hence the
LL_ADC_CHANNEL_VBAT constant is not available on all families. As the
feature is already checked at runtime (as the same driver supports
multiple instances), we can conditionally compile it depending on
LL_ADC_CHANNEL_VBAT instead.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Fix indentations of `adc_stm32_oversampling` function comments
to have everything aligned properly.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
According to the ES0418 about the ADC of the stm32G071
or other stm32g0x devices:
for sampling time set to 1.5 or 3.5 cycles,
the sampling in a single ADC conversion or in the first
conversion of a sequence takes one extra cycle.
Minimizing to 7.5 is fine.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
There is a build warning of unused `adc_stm32_oversampling_ratioshift`
function: [-Werror=unused-function]. This makes twister fail, as all
warnings are treated as errors.
Fix that by ifndef'ing adc_stm32_oversampling_ratioshift().
Fixes: c57a41c5d2 ("drivers/adc: stm32: do not disable the ADC if
resolution is unchanged")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
It allows the path for VBATEN on stm32 series
to monitor the Vbat voltage, in case of CONFIG_STM32_VBAT
Add the common Vref value as a property of the ADC.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In case the resolution is already correct (probably the common use
case), do nothing instead of disabling the ADC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ADC is currently disabled and re-enabled multiple time during each
read. Enabling the ADC is not a free operation on some series and some
internal channels like VREFINT take even longer. This patch improve the
situation by removing the calls to adc_stm32_enable(), replacing it by a
single call just before triggering the conversion.
This also open the possibility to not reconfigure the ADC if it is
already configured, implemented in the following patches.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Entering deep sleep mode stops the source clock of the ADC module and
could corrupt the ongoing ADC conversion. This commit lets ADC driver
acquire the PM lock during the ADC operation (either single conversion
or repetitive scan) and release it when the ADC conversion stops.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Files including <zephyr/kernel.h> do not have to include
<zephyr/zephyr.h>, a shim to <zephyr/kernel.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The current sam0 adc driver not implement correctly the adc_reference
enum values. This try homonize adc input referece by tracking VDDANA
at ADC_REF_VDD_1. The ADC_REF_VDD_1_2 were fixed with correct INTVCCx
channel selection.
Fixes#45443
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add inclusions of header files with devicetree related ADC definitions
to the nRF SoC dtsi files so that those definitions can be used also
for nRF SoC based boards.
Provide definitions of nRF ADC and SAADC analog inputs suitable
for use in devicetree.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx adc driver. Please notice users need to
configure the corresponding pinctrl nodes in 'pinctrl-0' property in the
adc0 DT node. For example, if ADC0 and ADC2 channels are selected for
the application, please add the follwoings in your board DT layout file.
&adc0 {
status = "okay";
/* Use adc0 channel 0 and 2 for 'adc_api' driver tests */
pinctrl-0 = <&adc0_chan0_gp45
&adc0_chan2_gp43>;
pinctrl-names = "default";
};
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This is a follow-up to commits e15bdaa1bd
and 07bf22cc94.
The above two commits added some enumerated gain values and those
are not currently handled by the inverting function. Add the missing
entries to the conversion array in the function.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
ADC threshold control register offset is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
update macro to access register accordingly. Driver behavior is not
meant to be impacted.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Number of supported ADC thresholds is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
replace macro usage. Driver behavior is not meant to be impacted.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
