allows use of touch_sensor, rtc_counter, and wdt simultaneously by enabling
ESP_INTR_FLAG_SHARED when calling esp_intr_alloc()
Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
Include value of 30 us as not valid to set alarm for RTC counter.
Change included to allow RTC timer to be properly set to use
RC_FAST_D256 as clock source.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Make sure to stop timer counter before interrupt is cleared,
otherwise it might re-trigger it due to default interrupt level mode.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add checks to return value of esp_intr_alloc to avoid drivers init
returning 0 when interrupt allocation fails.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
The RTC subsystem in espressif's SOCs, among other tasks
is responsible for clock selection for CPU and for low
power domain clocks such as RTC_SLOW and RTC_FAST.
This commit allows for proper clock source and rate
selection for CPU, using the espressif,riscv and
espressif,xtensa-lx6/7 bindings.
It also enables clock selection for RTC_FAST and RTC_SLOW,
that impacts some peripherals, such as rtc_timer.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:
- changing the CONFIG_SOC_ESP32* to refer to
the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
provide a SOC model config
- introducing the 'common' folder to hide all
commonly used configs and files.
- updating west.yml to reflect previous changes in hal
Signed-off-by: Marek Matej <marek.matej@espressif.com>
