Commit graph

80 commits

Author SHA1 Message Date
Pieter De Gendt
401a8a29f4 drivers: counter: Place API into iterable section
Add wrapper DEVICE_API macro to all counter_driver_api instances.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-11-29 21:46:15 +01:00
Yong Cong Sin
88c96f7986 drivers: counter: stm32: remove deprecated clock source Kconfigs
These clock selection Kconfigs should have been deprecated for
more than 2 releases, remove them:

- `CONFIG_COUNTER_RTC_STM32_CLOCK_SRC`
- `CONFIG_COUNTER_RTC_STM32_CLOCK_LSI`
- `CONFIG_COUNTER_RTC_STM32_CLOCK_LSE`

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-18 14:33:58 -04:00
Adam Berlinger
19b39406eb soc: st: Add support for STOP3 on STM32U5
LPTIM is not available in STOP3 mode, so RTC needs to be used instead.
This code usese similar approach as STM32WBAx for suspend to ram.
The STOP3 is disabled by default in device tree.

Signed-off-by: Adam Berlinger <adam.berlinger@st.com>
2024-06-15 04:44:26 -04:00
Abderrahmane Jarmouni
c09f1ec91a drivers: counter: stm32_rtc: fix clk disable for WBAX
clock_control_on() was called instead of clock_control_off().

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-05-09 10:29:05 +02:00
Krisna Resi
7dd7175336 drivers: rtc: Fix RTC alarm when using both CONFIG_COUNTER and CONFIG_PM
It is found that when we use CONFIG_COUNTER and CONFIG_PM concurrently,
the RTC alarm callback can be used only once (in some cases, it just
won't work at all, e.g., using CONFIG_BT). By set the DBP bit on PWR
control register 1 via LL_PWR_EnableBkUpAccess function to temporarily
disable write protection every time we assign RTC alarm, we can register
alarm callback correctly. Tested on Nucleo WB55RG.

Fixes: #68673
Signed-off-by: Krisna Resi <krisna_resi@ymail.com>
2024-03-15 09:33:14 +00:00
Guillaume Gautier
ffb581a552 drivers: counter: stm32 rtc: add basic pm support
Add basic PM support for STM32 RTC counter.
It is useful for Suspend to RAM support to reenable the RTC register clock
after wakeup from Standby.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-01-30 10:49:22 +01:00
Erwan Gouriou
645de482f0 drivers: counter: Add support for stm32wba devices
Implement RTC support in counter driver for STM32WBA devices.

Changes are made according to the following specificities:
- Similarly to STM32U5, it is not connected to EXTI.
- On this series, there is no bit in BCDR register to enable RTC. Enabling
RTC is done directly via the RCC APB register bit

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-11-08 15:11:27 +00:00
Dawid Niedzwiecki
68292b0310 counter: stm32 rtc: improve readability
Split the read function into 2 versions (date and no date) since they
don't have common code.

It improves readability.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-09-26 15:05:35 +02:00
Dawid Niedzwiecki
49f9aa7d12 counter: stm32 rtc: handle sub second registers
Add support for using the sub second registers. It allows reading and
setting alarm with the sub second tick resolution.

The RTC module is configured to get as high frequency as possible, which
equals the source clock (RTCCLK) divided by 2. To get such frequency,
the asynchronous prescaler is set to 1.

According to RM, setting the asynchronous prescaler to a high value
minimize consumption, so the change increase the power consumption.

Use a config to enable the sub second support.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-09-26 15:05:35 +02:00
Dawid Niedzwiecki
322f7980c5 counter: stm32 rtc: simplify calculation
RTC drivers uses only seconds, so transition to microseconds is
necessary.

Change way of calculation tick<->time to avoid unnecessary
conversations.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-09-26 15:05:35 +02:00
Dawid Niedzwiecki
c7d779f6e2 counter: stm32 rtc: fix indentations
Fix indentations of the API definition.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-09-26 15:05:35 +02:00
Dawid Niedzwiecki
16370a259a counter: stm32 rtc: improve reading registers
Synchronize reading two separate registers. In some edge cases the read
registers could point different dates.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-09-26 15:05:35 +02:00
Dawid Niedzwiecki
ad53863d1a counter: stm32 rtc: improve assigning configs
The config values have been hardcoded as magic values. Introduce
universal calculation based on the DTS entries.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-09-26 15:05:35 +02:00
Brett Witherspoon
4a250c26b1 drivers: counter: fix index of stm32 RTC source clock
The DT_INST_CLOCKS_CELL macro takes as the first argument the device
instance and not the cell index. This change correctly gets the second
index of the first device as intended.

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-09-20 11:21:40 +01:00
Francois Ramu
d574636b78 drivers: counter: add the support of the RTC to the stm32h5
Add the stm32h5 serie to the stm32 RTC counter driver
EXTI Line is 17 (for stm32h50x or non-secure stm32h56x/h57x).
The drivers must Enable access to the BackUp Domain.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-04-05 10:39:19 +00:00
Pieter De Gendt
6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Benjamin Björnsson
c02688a308 drivers: counter: add support for rtc in STM32C0-series
This commit extends the rtc counter driver to work on
the STM32C0-series.

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2023-03-20 09:53:49 +01:00
Benjamin Björnsson
6c8ef27a77 drivers: counter: stm32_rtc: enable backup domain only when supported
The STM32C0-series does not have a backup domain, this patch
enables us to extend this driver to the C0-series.

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2023-03-20 09:53:49 +01:00
Guillaume Gautier
3e6c9c40aa drivers: counter: Properly deprecate Kconfig symbols in STM32 RTC driver
Now that both RTC source clock Kconfig symbols are disabled by default,
we invert the ifdef so that in the absence of configuration we still
fall in the LSI configuration.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-01-09 10:14:35 +01:00
Gerson Fernando Budke
e68f568f86 drivers: counter: Enable support to stm32l5 mcu
Add driver entries to enable stm32l5 rtc driver.

Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
2022-11-29 13:40:27 +00:00
Guillaume Gautier
3bfc22ac73 drivers: counter: Add support for STM32 RTC source from dts
Add support for STM32 RTC source from dts

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2022-11-10 11:27:49 +00:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Tatsuroh Hayashi
cc434a9fe1 drivers: counter: STM32F1RTC support
Add RTC support of STM32F1 family.

Fixes #31175

Signed-off-by: Tatsuroh Hayashi <tatzu884@gmail.com>
2022-09-06 09:43:54 -05:00
Gerard Marull-Paretas
a202341958 devices: constify device pointers initialized at compile time
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).

Automated using:

```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-22 17:08:26 +02:00
Wojciech Slenska
aebd68ea41 drivers: counter: stm32u5 family compatibility
In STM32U5X family there is no EXTI line for RTC.

Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
2022-08-11 07:24:27 +01:00
Henrik Brix Andersen
e885ead428 drivers: counter: check if clock device is ready before accessing
Add check for device_is_ready() before accessing clock control devices.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-08-09 17:16:16 +02:00
Gerard Marull-Paretas
fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Gerard Marull-Paretas
c4550bc931 drivers: counter: drop DEV_DATA/DEV_CFG usage
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-19 18:16:02 +01:00
Maureen Helm
165963c115 drivers: counter: Refactor drivers to use shared init priority
Refactors all of the counter drivers to use a shared driver class
initialization priority configuration, CONFIG_COUNTER_INIT_PRIORITY, to
allow configuring counter drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.

The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are the maxim_ds3231 and mcp7940n drivers which have a
dependency on a SPI driver and must therefore initialize later than the
default device priority.

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-10-23 20:44:49 -04:00
Fabio Baltieri
cb355f6e6c drivers: stm32_rtc: add STM32WL family support
Add RTC counter support for the STM32WL family.

Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
2021-06-07 12:04:15 +02:00
Gerard Marull-Paretas
f9928479a1 drivers: counter: remove usage of device_pm_control_nop
device_pm_control_nop is now deprecated in favour of NULL.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-28 10:54:58 -04:00
Erwan Gouriou
2691541ad2 drivers/clock_controller: stm32: Prepare for dts based configuration
To allow transition to device tree based clock configuration on
stm32 targets, rework clock_control driver to use intermediate
STM32_ macros initially defined as the equivalent Kconfig macros
for now.
Propagate the change in all code using these macros.

The reason to introduce these new macros instead of configuring
Kconfig flags using dt kconfigfunctions is that we'll need
to be able to inform users that Kconfig flags are deprecated
once the whole family conversion is done, to encourage
out of tree users to adopt this new configuration scheme.

Note: For now STM32H7 series and code is excluded.
This is the same for some series specific code such as
PLL mul/div for L0/L1 and XTRE prescaler on F1 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-27 11:53:37 +02:00
Kumar Gala
607469616d counters: Remove deprecated APIs
Remove support for counter_read and counter_get_max_relative_alarm as
they have been deprecated for at least 2 releases.  As part of the
removal of counter_get_max_relative_alarm remove the code in all
counter drivers that implemented the API.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-18 19:35:14 -04:00
Shlomi Vaknin
41ca34a752 drivers: stm32: rtc: Add option to keep rtc value
Add option to keep rtc value between resets.

Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
2021-03-18 08:46:30 -04:00
Kumar Gala
b275fec8c4 soc: stm32: convert to use DEVICE_DT_GET for clocks
Convert from device_get_binding to DEVICE_DT_GET.  In doing this we
no longer need the label in the devicetree node so we remove that.

Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 17:01:37 -06:00
Antonis Sioutas
b36538d5a4 drivers: counter: stm32: Fix alarm time calculation
The calculated alarm time starts from 2000 but the gmtime_r needs as
input the time from epoch (1970). This causes the alarm time to be
miscalculated due to leap years, as 2000 is a leap year and 1970 is not.
To fix the issue, the 2000 timestamp can be added to the input time of
gmtime_r.

Fixes #32260

Signed-off-by: Antonis Sioutas <antonis.si510@gmail.com>
2021-02-14 18:20:11 -05:00
Francois Ramu
c86aefd3bb drivers: counter: rtc for stm32g0 soc series
This patch set the EXTI line 19 as the RTC
on the stm32g0x serie from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-01-06 08:09:47 -06:00
Kumar Gala
93c6e1d2f6 drivers: counter: Convert drivers to new DT device macros
Convert counter drivers to use new DT variants of the DEVICE APIs.
    DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
    DEVICE_GET -> DEVICE_DT_GET
    DEVICE_DECLARE -> DEVICE_DT_INST_DECLARE

etc..

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-12-15 18:30:06 -05:00
Peter Bigot
7a23490087 drivers: counter: stm32_rtc: remove dependency on maximal libc
mktime() was being used to convert from struct tm to time_t, but
Zephyr now has functions for that.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-12-01 14:54:12 -05:00
Peter Bigot
509a26304b drivers: counter: stm32_rtc: clarify epoch for time_t vs RTC
time_t always measures as seconds since 1970-01-01T00:00:00Z.  Fix a
comment that identified the wrong epoch year, and document what the
value of the offset means.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-12-01 14:54:12 -05:00
Martin Jäger
3ef8451e82 drivers: counter: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Giancarlo Stasi
ba7ef854d8 drivers: stm32: fix MSI PLL mode enabling
1. clock: move the call for MSI hardware auto calibration enabling
    before the control of MSI enable to ensure its execution in all
    cases.
 2. counter: add call for MSI hardware auto calibration enabling after
    the LSE enabling and after possible backup domain reset that may
    clear MSIPLLEN.

Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
2020-10-02 11:46:22 +02:00
Tomasz Bursztyka
4dcfb5531c isr: Normalize usage of device instance through ISR
The goal of this patch is to replace the 'void *' parameter by 'struct
device *' if they use such variable or just 'const void *' on all
relevant ISRs

This will avoid not-so-nice const qualifier tweaks when device instances
will be constant.

Note that only the ISR passed to IRQ_CONNECT are of interest here.

In order to do so, the script fix_isr.py below is necessary:

from pathlib import Path
import subprocess
import pickle
import mmap
import sys
import re
import os

cocci_template = """
@r_fix_isr_0
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
 ...
(
 const struct device *D = (const struct device *)P;
|
 const struct device *D = P;
)
 ...
}

@r_fix_isr_1
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
 ...
 const struct device *D;
 ...
(
 D = (const struct device *)P;
|
 D = P;
)
 ...
}

@r_fix_isr_2
@
type ret_type;
identifier A;
@@
-ret_type <!fn!>(void *A)
+ret_type <!fn!>(const void *A)
{
 ...
}

@r_fix_isr_3
@
const struct device *D;
@@
-<!fn!>((void *)D);
+<!fn!>(D);

@r_fix_isr_4
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
 ...
(
-const struct device *D = (const struct device *)P;
|
-const struct device *D = P;
)
 ...
}

@r_fix_isr_5
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
 ...
-const struct device *D;
...
(
-D = (const struct device *)P;
|
-D = P;
)
 ...
}
"""

def find_isr(fn):
    db = []
    data = None
    start = 0

    try:
        with open(fn, 'r+') as f:
            data = str(mmap.mmap(f.fileno(), 0).read())
    except Exception as e:
        return db

    while True:
        isr = ""
        irq = data.find('IRQ_CONNECT', start)
        while irq > -1:
            p = 1
            arg = 1
            p_o = data.find('(', irq)
            if p_o < 0:
                irq = -1
                break;

            pos = p_o + 1

            while p > 0:
                if data[pos] == ')':
                    p -= 1
                elif data[pos] == '(':
                    p += 1
                elif data[pos] == ',' and p == 1:
                    arg += 1

                if arg == 3:
                    isr += data[pos]

                pos += 1

            isr = isr.strip(',\\n\\t ')
            if isr not in db and len(isr) > 0:
                db.append(isr)

            start = pos
            break

        if irq < 0:
            break

    return db

def patch_isr(fn, isr_list):
    if len(isr_list) <= 0:
        return

    for isr in isr_list:
        tmplt = cocci_template.replace('<!fn!>', isr)
        with open('/tmp/isr_fix.cocci', 'w') as f:
            f.write(tmplt)

        cmd = ['spatch', '--sp-file', '/tmp/isr_fix.cocci', '--in-place', fn]

        subprocess.run(cmd)

def process_files(path):
    if path.is_file() and path.suffix in ['.h', '.c']:
        p = str(path.parent) + '/' + path.name
        isr_list = find_isr(p)
        patch_isr(p, isr_list)
    elif path.is_dir():
        for p in path.iterdir():
            process_files(p)

if len(sys.argv) < 2:
    print("You need to provide a dir/file path")
    sys.exit(1)

process_files(Path(sys.argv[1]))

And is run: ./fix_isr.py <zephyr root directory>

Finally, some files needed manual fixes such.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
e18fcbba5a device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.

A coccinelle rule is used for this:

@r_const_dev_1
  disable optional_qualifier
@
@@
-struct device *
+const struct device *

@r_const_dev_2
 disable optional_qualifier
@
@@
-struct device * const
+const struct device *

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Erwin Rol
7bf50875c5 drivers: counter: stm32: Allow disabling backup domain reset
Allow the disabling of reseting of the backup domain. This gives
the possibility to keep the content of the 20 backup registers
and use them to store information that survives a reboot.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2020-08-24 16:27:13 -05:00
Tomasz Bursztyka
98d9b01322 device: Apply driver_api/data attributes rename everywhere
Via coccinelle:

@r_device_driver_api_and_data_1@
struct device *D;
@@
(
D->
-	driver_api
+	api
|
D->
-	driver_data
+	data
)

@r_device_driver_api_and_data_2@
expression E;
@@
(
net_if_get_device(E)->
-	driver_api
+	api
|
net_if_get_device(E)->
-	driver_data
+	data
)

And grep/sed rules for macros:

git grep -rlz 'dev)->driver_data' |
	xargs -0 sed -i 's/dev)->driver_data/dev)->data/g'

git grep -rlz 'dev->driver_data' |
	xargs -0 sed -i 's/dev->driver_data/dev->data/g'

git grep -rlz 'device->driver_data' |
	xargs -0 sed -i 's/device->driver_data/device->data/g'

Fixes #27397

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-08-11 19:30:53 +02:00
Tomasz Bursztyka
af6140cc0d device: Apply config_info rename everywhere
Via coccinelle:

@r_device_config@
struct device *D;
@@

D->
-	config_info
+	config

And 2 grep/sed rules for macros:

git grep -rlz 'dev)->config_info' |
	xargs -0 sed -i 's/dev)->config_info/dev)->config/g'

git grep -rlz 'dev->config_info' |
	xargs -0 sed -i 's/dev->config_info/dev->config/g'

Fixes #27397

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-08-11 19:30:53 +02:00
Francois Ramu
c098aabcaa drivers: counter: rtc for stm32f0 doc series
This patch set the EXTI line 17 as the RTC
on the stm32f0x from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-07-24 16:16:21 +02:00
Alexandre Bourdiol
c8ceca2d53 drivers: STM32 dualcore concurrent register access protection with HSEM
In case of dualcore, STM32H7, STM32W and STM32MP1,
protect concurrent register write access with HSEM.
Done for following drivers:
clock_control, counter, flash, gpio, interrupt_controller

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-07-09 11:27:56 +02:00
Francois Ramu
732df68fff drivers: counter: rtc for stm32f2 soc series
This patch set the EXTI line 17 as the RTC alarm pin
on the stm32f2x serie from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-06-10 09:40:21 +02:00