Commit graph

10 commits

Author SHA1 Message Date
Jilay Pandya
22a9f71b88 drivers: dma: place api in iterable sections
This commit places dma driver class in iterable sections

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2024-12-16 18:25:24 +01:00
Abderrahmane Jarmouni
8173acad11 drivers: dma: stm32_bdma: fix regression
Fix regression introduced by 1e1c14cfee
undefined variable name is used.

Signed-off-by: Abderrahmane Jarmouni <git@jarmouni.me>
2024-10-08 18:09:47 -04:00
Yong Cong Sin
52a202309b zephyr: bulk update to DT_NODE_HAS_STATUS_OKAY
Change instances of:

DT_NODE_HAS_STATUS(<node_id>, okay)

to

DT_NODE_HAS_STATUS_OKAY(<node_id>)

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-10-03 17:06:52 +01:00
Dominik Lau
1e1c14cfee drivers: dma: stm32: fix dma_stop stream busy handling for HAL override
For DMA channels overridden by HAL DMA, there was no way of
resetting stream busy variable.

Co-authored-by: Maciej Sobkowski <msobkowski@antmicro.com>
Signed-off-by: Dominik Lau <dlau@internships.antmicro.com>
2024-09-30 17:10:56 +01:00
Abderrahmane Jarmouni
e71b50244e drivers: dma: stm32_bdma: fix comments
Some comments were not updated following the change in how uncached
memory regions are defined in devicetree.

Signed-off-by: Abderrahmane Jarmouni <git@jarmouni.me>
2024-09-25 04:03:18 -04:00
Carson Green
f698fd525e drivers: dma: stm32: only clear busy flag when transfer is complete
The STM32 DMA driver can provide interrupts for transfers not yet complete.

However, the current implementation will clear the busy flag for all
interrupts when CONFIG_DMAMUX_STM32 is not enabled. The previous fix for
when CONFIG_DMAMUX_STM32 is enabled should also apply when not enabled.
Also if CONFIG_DMAMUX_STM32 is enabled busy flag will not be cleared when
error interrupts occur.

With this change, the busy flag is only cleared when completion interrupts
in non-cyclic mode or error interrupts occur. These are the cases where
transfer will not continue.

Signed-off-by: Carson Green <cgreen@tuta.com>
2024-09-24 14:24:28 -05:00
Carlo Caione
e4a125b6a4 dt: Make zephyr,memory-attr a capabilities bitmask
This is the final step in making the `zephyr,memory-attr` property
actually useful.

The problem with the current implementation is that `zephyr,memory-attr`
is an enum type, this is making very difficult to use that to actually
describe the memory capabilities. The solution proposed in this PR is to
use the `zephyr,memory-attr` property as an OR-ed bitmask of memory
attributes.

With the change proposed in this PR it is possible in the DeviceTree to
mark the memory regions with a bitmask of attributes by using the
`zephyr,memory-attr` property. This property and the related memory
region can then be retrieved at run-time by leveraging a provided helper
library or the usual DT helpers.

The set of general attributes that can be specified in the property are
defined and explained in
`include/zephyr/dt-bindings/memory-attr/memory-attr.h` (the list can be
extended when needed).

For example, to mark a memory region in the DeviceTree as volatile,
non-cacheable, out-of-order:

   mem: memory@10000000 {
       compatible = "mmio-sram";
       reg = <0x10000000 0x1000>;
       zephyr,memory-attr = <( DT_MEM_VOLATILE |
			       DT_MEM_NON_CACHEABLE |
			       DT_MEM_OOO )>;
   };

The `zephyr,memory-attr` property can also be used to set
architecture-specific custom attributes that can be interpreted at run
time. This is leveraged, among other things, to create MPU regions out
of DeviceTree defined memory regions on ARM, for example:

   mem: memory@10000000 {
       compatible = "mmio-sram";
       reg = <0x10000000 0x1000>;
       zephyr,memory-region = "NOCACHE_REGION";
       zephyr,memory-attr = <( DT_ARM_MPU(ATTR_MPU_RAM_NOCACHE) )>;
   };

See `include/zephyr/dt-bindings/memory-attr/memory-attr-mpu.h` to see
how an architecture can define its own special memory attributes (in
this case ARM MPU).

The property can also be used to set custom software-specific
attributes. For example we can think of marking a memory region as
available to be used for memory allocation (not yet implemented):

   mem: memory@10000000 {
       compatible = "mmio-sram";
       reg = <0x10000000 0x1000>;
       zephyr,memory-attr = <( DT_MEM_NON_CACHEABLE |
			       DT_MEM_SW_ALLOCATABLE )>;
   };

Or maybe we can leverage the property to specify some alignment
requirements for the region:

   mem: memory@10000000 {
       compatible = "mmio-sram";
       reg = <0x10000000 0x1000>;
       zephyr,memory-attr = <( DT_MEM_CACHEABLE |
			       DT_MEM_SW_ALIGN(32) )>;
   };

The conventional and recommended way to deal and manage with memory
regions marked with attributes is by using the provided `mem-attr`
helper library by enabling `CONFIG_MEM_ATTR` (or by using the usual DT
helpers).

When this option is enabled the list of memory regions and their
attributes are compiled in a user-accessible array and a set of
functions is made available that can be used to query, probe and act on
regions and attributes, see `include/zephyr/mem_mgmt/mem_attr.h`

Note that the `zephyr,memory-attr` property is only a descriptive
property of the capabilities of the associated memory  region, but it
does not result in any actual setting for the memory to be set. The
user, code or subsystem willing to use this information to do some work
(for example creating an MPU region out of the property) must use either
the provided `mem-attr` library or the usual DeviceTree helpers to
perform the required work / setting.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-09-15 12:46:54 +02:00
Carlo Caione
15e84cbfac dts: Move to 'zephyr,memory-attr'
Move to 'zephyr,memory-attr' and use the newly introduced helpers.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-07-25 11:22:10 +02:00
Pieter De Gendt
6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Hein Wessels
e01270793e drivers: dma: stm32: bdma support for H7
Implement STM32H7 BDMA driver.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-01 15:58:27 +01:00