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53 commits

Author SHA1 Message Date
Nathaniel Graff
c0a680166d drivers: gpio: sifive: Fix GPIO extern interrupts 
IRQ_CONNECT calls in the SiFive GPIO driver were misconfigured when the
conversion to DeviceTree support occurred.

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
 2018-10-15 21:39:21 -04:00
Nathaniel Graff
ca12b3f7d4 drivers: gpio: SiFive GPIO allows <32 pins 
Add ifdefs to the SiFive GPIO driver IRQ bindings to allow fewer than
32 pins to be configured based on the DTS configuration

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
 2018-08-18 10:46:36 -07:00
Nathaniel Graff
218d7a0aa9 riscv: Rename the FE310 SoC to Sifive Freedom 
FE310 is the name of one SoC out of a range of products in the SiFive
Freedom line. The FE310 SoC port in Zephyr is compatible with all of
these products, so rename the SoC to SiFive Freedom

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
 2018-08-16 06:23:01 -07:00